public MeshRenderer init()
{
Mesh mesh = owner.getComponent <Mesh>();
if (mesh == null)
{
//TODO implement logger
//Logger::log("Mesh component required");
return(this);
}
model = Matrix4.Identity;
shader = new Shader.Shader("Shader/vertex.vs", "Shader/fragment.fs");
VAO = GL.GenVertexArray();
VBO = GL.GenBuffer();
GL.BindBuffer(BufferTarget.ArrayBuffer, VBO);
GL.BufferData(BufferTarget.ArrayBuffer, sizeof(float) * mesh.vertexCount * 6, mesh.vertices, BufferUsageHint.StaticDraw);
GL.BindVertexArray(VAO);
// position attribute
GL.VertexAttribPointer(0, 3, VertexAttribPointerType.Float, false, 6 * sizeof(float), 0);
GL.EnableVertexAttribArray(0);
// normal attribute
GL.VertexAttribPointer(1, 3, VertexAttribPointerType.Float, false, 6 * sizeof(float), 3 * sizeof(float));
GL.EnableVertexAttribArray(1);
GL.BindBuffer(BufferTarget.ArrayBuffer, VBO);
// note that we update the lamp's position attribute's stride to reflect the updated buffer data
GL.VertexAttribPointer(0, 3, VertexAttribPointerType.Float, false, 6 * sizeof(float), 0);
GL.EnableVertexAttribArray(0);
return(this);
}
/// <summary>
/// Dispatches compute work.
/// </summary>
/// <param name="state">Current GPU state</param>
/// <param name="argument">Method call argument</param>
public void Dispatch(GpuState state, int argument)
{
uint qmdAddress = (uint)state.Get <int>(MethodOffset.DispatchParamsAddress);
var qmd = _context.MemoryAccessor.Read <ComputeQmd>((ulong)qmdAddress << 8);
GpuVa shaderBaseAddress = state.Get <GpuVa>(MethodOffset.ShaderBaseAddress);
ulong shaderGpuVa = shaderBaseAddress.Pack() + (uint)qmd.ProgramOffset;
int localMemorySize = qmd.ShaderLocalMemoryLowSize + qmd.ShaderLocalMemoryHighSize;
int sharedMemorySize = Math.Min(qmd.SharedMemorySize, _context.Capabilities.MaximumComputeSharedMemorySize);
Shader.Shader cs = ShaderCache.GetComputeShader(
shaderGpuVa,
qmd.CtaThreadDimension0,
qmd.CtaThreadDimension1,
qmd.CtaThreadDimension2,
localMemorySize,
sharedMemorySize);
CurrentCpMeta = cs.Meta;
_context.Renderer.Pipeline.SetProgram(cs.HostProgram);
var samplerPool = state.Get <PoolState>(MethodOffset.SamplerPoolState);
TextureManager.SetComputeSamplerPool(samplerPool.Address.Pack(), samplerPool.MaximumId, qmd.SamplerIndex);
var texturePool = state.Get <PoolState>(MethodOffset.TexturePoolState);
TextureManager.SetComputeTexturePool(texturePool.Address.Pack(), texturePool.MaximumId);
TextureManager.SetComputeTextureBufferIndex(state.Get <int>(MethodOffset.TextureBufferIndex));
ShaderProgramInfo info = cs.Meta.Info[0];
uint sbEnableMask = 0;
uint ubEnableMask = 0;
for (int index = 0; index < Constants.TotalCpUniformBuffers; index++)
{
if (!qmd.ConstantBufferValid(index))
{
continue;
}
ubEnableMask |= 1u << index;
ulong gpuVa = (uint)qmd.ConstantBufferAddrLower(index) | (ulong)qmd.ConstantBufferAddrUpper(index) << 32;
ulong size = (ulong)qmd.ConstantBufferSize(index);
BufferManager.SetComputeUniformBuffer(index, gpuVa, size);
}
for (int index = 0; index < info.CBuffers.Count; index++)
{
BufferDescriptor cb = info.CBuffers[index];
// NVN uses the "hardware" constant buffer for anything that is less than 8,
// and those are already bound above.
// Anything greater than or equal to 8 uses the emulated constant buffers.
// They are emulated using global memory loads.
if (cb.Slot < 8)
{
continue;
}
ubEnableMask |= 1u << cb.Slot;
ulong cbDescAddress = BufferManager.GetComputeUniformBufferAddress(0);
int cbDescOffset = 0x260 + cb.Slot * 0x10;
cbDescAddress += (ulong)cbDescOffset;
ReadOnlySpan <byte> cbDescriptorData = _context.PhysicalMemory.GetSpan(cbDescAddress, 0x10);
SbDescriptor cbDescriptor = MemoryMarshal.Cast <byte, SbDescriptor>(cbDescriptorData)[0];
BufferManager.SetComputeUniformBuffer(cb.Slot, cbDescriptor.PackAddress(), (uint)cbDescriptor.Size);
}
for (int index = 0; index < info.SBuffers.Count; index++)
{
BufferDescriptor sb = info.SBuffers[index];
sbEnableMask |= 1u << sb.Slot;
ulong sbDescAddress = BufferManager.GetComputeUniformBufferAddress(0);
int sbDescOffset = 0x310 + sb.Slot * 0x10;
sbDescAddress += (ulong)sbDescOffset;
ReadOnlySpan <byte> sbDescriptorData = _context.PhysicalMemory.GetSpan(sbDescAddress, 0x10);
SbDescriptor sbDescriptor = MemoryMarshal.Cast <byte, SbDescriptor>(sbDescriptorData)[0];
BufferManager.SetComputeStorageBuffer(sb.Slot, sbDescriptor.PackAddress(), (uint)sbDescriptor.Size);
}
ubEnableMask = 0;
for (int index = 0; index < info.CBuffers.Count; index++)
{
ubEnableMask |= 1u << info.CBuffers[index].Slot;
}
BufferManager.SetComputeStorageBufferEnableMask(sbEnableMask);
BufferManager.SetComputeUniformBufferEnableMask(ubEnableMask);
var textureBindings = new TextureBindingInfo[info.Textures.Count];
for (int index = 0; index < info.Textures.Count; index++)
{
var descriptor = info.Textures[index];
Target target = GetTarget(descriptor.Type);
if (descriptor.IsBindless)
{
textureBindings[index] = new TextureBindingInfo(target, descriptor.CbufOffset, descriptor.CbufSlot);
}
else
{
textureBindings[index] = new TextureBindingInfo(target, descriptor.HandleIndex);
}
}
TextureManager.SetComputeTextures(textureBindings);
var imageBindings = new TextureBindingInfo[info.Images.Count];
for (int index = 0; index < info.Images.Count; index++)
{
var descriptor = info.Images[index];
Target target = GetTarget(descriptor.Type);
imageBindings[index] = new TextureBindingInfo(target, descriptor.HandleIndex);
}
TextureManager.SetComputeImages(imageBindings);
BufferManager.CommitComputeBindings();
TextureManager.CommitComputeBindings();
_context.Renderer.Pipeline.DispatchCompute(
qmd.CtaRasterWidth,
qmd.CtaRasterHeight,
qmd.CtaRasterDepth);
UpdateShaderState(state);
}
/// <summary>
/// Updates host shaders based on the guest GPU state.
/// </summary>
/// <param name="state">Current GPU state</param>
private void UpdateShaderState(GpuState state)
{
ShaderAddresses addresses = new ShaderAddresses();
Span <ShaderAddresses> addressesSpan = MemoryMarshal.CreateSpan(ref addresses, 1);
Span <ulong> addressesArray = MemoryMarshal.Cast <ShaderAddresses, ulong>(addressesSpan);
ulong baseAddress = state.Get <GpuVa>(MethodOffset.ShaderBaseAddress).Pack();
for (int index = 0; index < 6; index++)
{
var shader = state.Get <ShaderState>(MethodOffset.ShaderState, index);
if (!shader.UnpackEnable() && index != 1)
{
continue;
}
addressesArray[index] = baseAddress + shader.Offset;
}
Shader.Shader gs = ShaderCache.GetGraphicsShader(state, addresses);
CurrentGpMeta = gs.Meta;
_vsUsesInstanceId = gs.Meta.Info[0]?.UsesInstanceId ?? false;
for (int stage = 0; stage < Constants.ShaderStages; stage++)
{
ShaderProgramInfo info = gs.Meta.Info[stage];
if (info == null)
{
continue;
}
var textureBindings = new TextureBindingInfo[info.Textures.Count];
for (int index = 0; index < info.Textures.Count; index++)
{
var descriptor = info.Textures[index];
Target target = GetTarget(descriptor.Type);
if (descriptor.IsBindless)
{
textureBindings[index] = new TextureBindingInfo(target, descriptor.CbufSlot, descriptor.CbufOffset);
}
else
{
textureBindings[index] = new TextureBindingInfo(target, descriptor.HandleIndex);
}
}
TextureManager.SetGraphicsTextures(stage, textureBindings);
var imageBindings = new TextureBindingInfo[info.Images.Count];
for (int index = 0; index < info.Images.Count; index++)
{
var descriptor = info.Images[index];
Target target = GetTarget(descriptor.Type);
imageBindings[index] = new TextureBindingInfo(target, descriptor.HandleIndex);
}
TextureManager.SetGraphicsImages(stage, imageBindings);
uint sbEnableMask = 0;
uint ubEnableMask = 0;
for (int index = 0; index < info.SBuffers.Count; index++)
{
sbEnableMask |= 1u << info.SBuffers[index].Slot;
}
for (int index = 0; index < info.CBuffers.Count; index++)
{
ubEnableMask |= 1u << info.CBuffers[index].Slot;
}
BufferManager.SetGraphicsStorageBufferEnableMask(stage, sbEnableMask);
BufferManager.SetGraphicsUniformBufferEnableMask(stage, ubEnableMask);
}
_context.Renderer.Pipeline.SetProgram(gs.HostProgram);
}
