public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { FPGA.Optimizations.AddOptimizer <DefaultOptimizer>(); const uint baud = 115200; UART.ReadFloat(baud, RXD, out float mass); UART.ReadFloat(baud, RXD, out float radius); var vOrbit = FPGAOrbitalCalc.TOrbit(mass, radius); UART.WriteFloat(baud, vOrbit, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { float f1 = 0, f2 = 0; FPGA.Signal <float> result = 0; byte fpuOp = 0; FPGA.Signal <bool> fpuTrigger = false, fpuCompleted = false; FPGA.Config.Entity <IFPU>().Op(fpuTrigger, fpuCompleted, f1, f2, fpuOp, result); Sequential handler = () => { const int baud = 115200; UART.ReadFloat(baud, RXD, out f1); UART.ReadFloat(baud, RXD, out f2); UART.Read(baud, RXD, out fpuOp); fpuTrigger = true; FPGA.Runtime.WaitForAllConditions(fpuCompleted); UART.WriteFloat(baud, result, TXD); }; const bool trigger = true; FPGA.Config.OnSignal(trigger, handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { FPGA.Optimizations.AddOptimizer <DefaultOptimizer>(); const uint baud = 115200; float[] buff = new float[4]; for (byte i = 0; i < 4; i++) { UART.ReadFloat(baud, RXD, out float tmp); buff[i] = tmp; } var deltaV = FPGAOrbitalCalc.DeltaVInclinationOrbit( buff[0], buff[1], buff[2], buff[3] ); UART.WriteFloat(baud, deltaV, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { Sequential handler = () => { FPU.FPUScope(); const int baud = 115200; byte command = 0; float op1, op2, res = 0; while (true) { UART.ReadFloat(baud, RXD, out op1); UART.ReadFloat(baud, RXD, out op2); command = UART.Read(baud, RXD); FloatControllersOps.TestHandler(op1, op2, command, out res); UART.WriteFloat(baud, res, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { const uint baud = 115200; Sequential handler = () => { FPGA.Optimizations.AddOptimizer <TestOptimizer>(); float f1 = 0, f2 = 1.234f; bool internalTXD = true; // hardlink from register to output signal, it has to hold its value FPGA.Config.Link(internalTXD, TXD); while (true) { UART.ReadFloat(baud, RXD, out f1); UART.RegisteredWriteFloat(baud, f1, out internalTXD); //UART.RegisteredWriteFloat(baud, f2, out internalTXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { const uint baud = 115200; var stream = new FPGA.SyncStream <float>(); Sequential <float> streamHandler = (data) => { UART.WriteFloat(baud, data, TXD); }; FPGA.Config.OnStream(stream, streamHandler); Sequential handler = () => { float f1 = 0, f2 = 1.234f; UART.ReadFloat(baud, RXD, out f1); stream.Write(f1); stream.Write(f2); }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { const uint baud = 115200; Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { float op1 = 0, op2 = 0; UART.ReadFloat(baud, RXD, out op1); UART.ReadFloat(baud, RXD, out op2); var result = Compare(op1, op2); UART.Write(baud, result, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { const uint baud = 115200; Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { float data = 0; UART.ReadFloat(baud, RXD, out data); float[] buff = new float[2]; for (sbyte idx = -10; idx <= 10; idx++) { buff[0] = data * idx; buff[1] = idx * data; for (var i = 0; i < buff.Length; i++) { var tmp = buff[i]; UART.WriteFloat(baud, tmp, TXD); } } } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD) { const int baud = 115200; bool internalTXD = true; FPGA.Config.Link(internalTXD, TXD); FPGA.Signal <bool> handler0 = false, handler1 = false; float res0 = 0, res1 = 0; FPGA.Config.Suppress("W0003", handler0, handler1, res0, res1); Sequential handler = () => { uint idx = FPGA.Config.InstanceId(); FPU.FPUScope(); float op1, op2, res = 0; UART.ReadFloat(baud, RXD, out op1); UART.ReadFloat(baud, RXD, out op2); FloatControllersOps.TestHandler(op1, op2, 0, out res); // TODO: this is constant expression, should remove branch comletely if (idx == 0) { res0 = res; handler0 = true; } else { res1 = res; handler1 = true; } }; FPGA.Config.OnStartup(handler, 2); // expect to be completed at exactly the same time as they should not share FPU Func <bool> trigger = () => handler0 && handler1; Sequential onTigger = () => { UART.RegisteredWriteFloat(baud, res0, out internalTXD); UART.RegisteredWriteFloat(baud, res1, out internalTXD); }; FPGA.Config.OnSignal(trigger, onTigger); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { UART.ReadFloat(115200, RXD, out float source); var result = SequentialMath.InitialApproximation(source); UART.WriteFloat(115200, result, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { float data = 0; UART.ReadFloat(115200, RXD, out data); data = FPGATrigonometryTools.TaylorSin(data); UART.WriteFloat(115200, data, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { const uint baud = 115200; Sequential handler = () => { FPU.FPUScopeNoSync(); while (true) { float data = 0; UART.ReadFloat(baud, RXD, out data); var result = (long)ReturnExpression(data); UART.WriteUnsigned64(baud, (ulong)result, TXD); } }; FPGA.Config.OnStartup(handler); }
public static async Task Aggregator( FPGA.InputSignal <bool> RXD, FPGA.OutputSignal <bool> TXD ) { const int baud = 115200; uint clockCounter = 0; Diag.ClockCounter(clockCounter); bool internalTXD = true; FPGA.Config.Link(internalTXD, TXD); byte testOp; float op1, op2, res = 0; Sequential handler = () => { FPU.FPUScope(); while (true) { uint start = 0, end = 0; res = 0; UART.Read(baud, RXD, out testOp); UART.ReadFloat(baud, RXD, out op1); UART.ReadFloat(baud, RXD, out op2); switch ((FPUTimingType)testOp) { case FPUTimingType.Add: start = clockCounter; res = op1 + op2; end = clockCounter; break; case FPUTimingType.Sub: start = clockCounter; res = op1 - op2; end = clockCounter; break; case FPUTimingType.Mul: start = clockCounter; res = op1 * op2; end = clockCounter; break; case FPUTimingType.Div: start = clockCounter; res = op1 / op2; end = clockCounter; break; default: start = clockCounter; end = clockCounter; break; } UART.RegisteredWriteFloat(baud, res, out internalTXD); UART.RegisteredWriteUnsigned32(baud, end - start, out internalTXD); } }; FPGA.Config.OnStartup(handler); }