public static void SaveReg(HardwareRegisterSet registers, string pOutFolder, CortexCore core)
{
registers.UserFriendlyName = "ARM Cortex " + (core.ToString().Replace("Plus", "+"));
string outputFile = $@"{pOutFolder}\core_{core}.xml";
Directory.CreateDirectory(Path.GetDirectoryName(outputFile));
XmlTools.SaveObject(registers, outputFile);
}
static public void SaveReg(HardwareRegisterSet registers, string pOutFolder, CortexCore core)
{
registers.UserFriendlyName = "ARM Cortex " + (core.ToString().Replace("Plus", "+"));
string outputFile = $@"{pOutFolder}\core_{core}.xml";
Directory.CreateDirectory(Path.GetDirectoryName(outputFile));
XmlTools.SaveObject(registers, outputFile);
}
public ParsedMCU(XmlElement n, string familyDir, DeviceMemoryDatabase db, string[] cores, int coreIndex)
{
Name = n.GetAttribute("Name");
RefName = n.GetAttribute("RefName");
RPN = n.GetAttribute("RPN");
const string prefix = "Arm Cortex-";
if (!cores[coreIndex].StartsWith(prefix, StringComparison.InvariantCultureIgnoreCase))
{
throw new Exception("Unknown core: " + cores[coreIndex]);
}
string shortCore = cores[coreIndex].Substring(prefix.Length);
Core = ParseCore(shortCore);
if (cores.Length > 1)
{
CoreSuffix = shortCore.Replace('+', 'p');
if (coreIndex > 0)
{
//Secondary core uses a special name.
Name += "_" + CoreSuffix;
RPN += "_" + CoreSuffix;
}
}
else
{
CoreSuffix = null;
}
Memories = db.LookupMemories(RPN, RefName, CoreSuffix, out LinkerScripts, out Define, out string fpu);
FPU = ParseFPU(fpu);
if (cores.Length > 1 && coreIndex > 0 && Core == CortexCore.M4)
{
FPU = FPUType.SP;
}
//RAMs = mcuDef.SelectNodes("mcu:Ram", nsmgr2).OfType<XmlElement>().Select(n2 => int.Parse(n2.InnerText)).ToArray();
RAMs = n.SelectNodes("Ram").OfType <XmlElement>().Select(n2 => int.Parse(n2.InnerText)).ToArray();
if (RAMs.Length < 1)
{
throw new Exception("No RAMs defined for " + Name);
}
var flash = n.SelectNodes("Flash").OfType <XmlElement>().Select(n2 => int.Parse(n2.InnerText)).ToArray();
if (flash.Length != 1)
{
throw new Exception("Multiple or missing FLASH definitions of " + Name);
}
FLASH = flash[0];
}
private void Window_Loaded(object sender, RoutedEventArgs e)
{
PreviewService.previewSetup();
CortexCore.DecoderSetup();
if (ConnectionService.ConnectCamera())
{
PreviewService.startPreview(previewFPS.HIGH);
}
}
public NordicMCUBuilder(string name, int flashKB, int ramKB, CortexCore core, bool fpu, string defaultSoftdevice, string defaultBoard)
{
Name = name;
FlashSize = flashKB * 1024;
RAMSize = ramKB * 1024;
Core = core;
FPU = fpu ? FPUType.SP : FPUType.None;
DefaultSoftdevice = defaultSoftdevice;
StartupFile = "$$SYS:BSP_ROOT$$/nRF5x/modules/nrfx/mdk/gcc_startup_nrf$$com.sysprogs.bspoptions.nrf5x.mcu.basename$$.S";
}
public ParsedMCU(XmlElement n, string familyDir, DeviceMemoryDatabase db)
{
Name = n.GetAttribute("Name");
RefName = n.GetAttribute("RefName");
RPN = n.GetAttribute("RPN");
//var mcuDef = LoadMCUDefinition(familyDir, Name);
//var nsmgr2 = new XmlNamespaceManager(mcuDef.OwnerDocument.NameTable);
//nsmgr2.AddNamespace("mcu", "http://mcd.rou.st.com/modules.php?name=mcu");
var core = n.SelectSingleNode("Core").InnerText;
switch (core)
{
case "ARM Cortex-M0":
Core = CortexCore.M0;
break;
case "ARM Cortex-M0+":
Core = CortexCore.M0Plus;
break;
case "ARM Cortex-M3":
Core = CortexCore.M3;
break;
case "ARM Cortex-M4":
Core = CortexCore.M4;
break;
case "ARM Cortex-M7":
Core = CortexCore.M7;
break;
default:
throw new Exception("Don't know how to map core: " + core);
}
Memories = db.LookupMemories(RPN, RefName);
//RAMs = mcuDef.SelectNodes("mcu:Ram", nsmgr2).OfType<XmlElement>().Select(n2 => int.Parse(n2.InnerText)).ToArray();
RAMs = n.SelectNodes("Ram").OfType <XmlElement>().Select(n2 => int.Parse(n2.InnerText)).ToArray();
if (RAMs.Length < 1)
{
throw new Exception("No RAMs defined for " + Name);
}
var flash = n.SelectNodes("Flash").OfType <XmlElement>().Select(n2 => int.Parse(n2.InnerText)).ToArray();
if (flash.Length != 1)
{
throw new Exception("Multiple or missing FLASH definitions of " + Name);
}
FLASH = flash[0];
}
private void Btn_scanOnce_Click(object sender, RoutedEventArgs e)
{
PreviewService.stopPreview();
CortexCore.Decode_async(PreviewService.imgOriginal.ToBitmap());
//PreviewService.imgOriginal.Draw(CortexCore.BondRec, new Bgr(0, 0, 255), 3);
//if (mMessageBox.Show("" + CortexCore.ResultString) == mDialogResult.yes)
//{
// PreviewService.startPreview(previewFPS.HIGH);
// CortexCore.mCortexDecoder.ResetResult();
//}
}
public static void AddCoreSpecificFlags(CoreSpecificFlags flagsToDefine, MCUFamily family, string core)
{
CortexCore translatedCore = core switch {
"cm0plus" => CortexCore.M0Plus,
"cm0" => CortexCore.M0,
"cm3" => CortexCore.M3,
"cm33" => CortexCore.M33_FPU,
"cm33_nodsp" => CortexCore.M33,
"cm4" => CortexCore.M4,
"cm7" => CortexCore.M7,
_ => CortexCore.Invalid
};
AddCoreSpecificFlags(flagsToDefine, family, translatedCore);
}
}
static public void SaveReg(HardwareRegisterSet registers, string pOutFolder, CortexCore core, bool extendNVICRegisters)
{
if (extendNVICRegisters)
{
var lst = registers.Registers.ToList();
Regex rgName = new Regex("NVIC_(.*)3");
for (int i = 0; i < lst.Count; i++)
{
var m = rgName.Match(lst[i].Name);
if (m.Success)
{
if (lst[i - 1].Name != lst[i].Name.Replace("3", "2"))
{
continue;
}
if (lst[i + 1].Name == lst[i].Name.Replace("3", "4"))
{
continue;
}
else
{
var originalReg = lst[i];
ulong address = TryParseMaybeHex(originalReg.Address).Value;
ulong increment = TryParseMaybeHex(lst[i].Address).Value - TryParseMaybeHex(lst[i - 1].Address).Value;
for (int j = 4; j < 8; j++)
{
var reg = XmlTools.LoadObjectFromString <HardwareRegister>(XmlTools.SaveObjectToString(originalReg));
reg.Name = $"NVIC_{m.Groups[1].Value}{j}";
address += increment;
reg.Address = $"0x{address:x8}";
lst.Insert(++i, reg);
}
}
}
}
registers.Registers = lst.ToArray();
}
registers.UserFriendlyName = "ARM Cortex " + (core.ToString().Replace("Plus", "+"));
string outputFile = $@"{pOutFolder}\core_{core}.xml";
Directory.CreateDirectory(Path.GetDirectoryName(outputFile));
XmlTools.SaveObject(registers, outputFile);
}
private static void previewRoutine_doWork(object sender, DoWorkEventArgs e)
{
IsCapturing = true; previewFPS FPS = (previewFPS)e.Argument;
while (!previewRoutine.CancellationPending)
{
if (ConnectionService.mCamera == null)
{
previewRoutine.CancelAsync();
return;
}
imgOriginal = ConnectionService.Capture();
if (MainWindow.main.DecodeSwitch)
{
CortexCore.Decode(imgOriginal.ToBitmap());
}
previewRoutine.ReportProgress(0);
Thread.Sleep(1000 / (int)FPS);
}
}
internal static void AddCoreSpecificFlags(bool defineConfigurationVariables, MCUFamily family, CortexCore core)
{
string coreName = null;
switch (core)
{
case CortexCore.M0:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m0 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM0" };
coreName = "M0";
break;
case CortexCore.M0Plus:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m0plus -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM0PLUS" };
coreName = "M0";
break;
case CortexCore.M3:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m3 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM3" };
coreName = "M3";
break;
case CortexCore.M4:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m4 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM4" };
family.CompilationFlags.ASFLAGS = "-mfpu=fpv4-sp-d16";
coreName = "M4";
break;
case CortexCore.M7:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m7 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM7" };
coreName = "M7";
break;
default:
throw new Exception("Unsupported core type");
}
if (defineConfigurationVariables)
{
if (core == CortexCore.M0)
{
family.AdditionalSystemVars = new SysVarEntry[] { new SysVarEntry {
Key = PrimaryMemoryOptionName, Value = "flash"
} }
}
;
else
{
family.ConfigurableProperties = new PropertyList
{
PropertyGroups = new List <PropertyGroup>
{
new PropertyGroup
{
Properties = new List <PropertyEntry>
{
new PropertyEntry.Enumerated
{
Name = "Execute from",
UniqueID = PrimaryMemoryOptionName,
SuggestionList = new PropertyEntry.Enumerated.Suggestion[]
{
new PropertyEntry.Enumerated.Suggestion {
InternalValue = "flash", UserFriendlyName = "FLASH"
},
new PropertyEntry.Enumerated.Suggestion {
InternalValue = "sram", UserFriendlyName = "SRAM"
},
}
}
}
}
}
};
if (core == CortexCore.M4 || core == CortexCore.M7)
{
family.ConfigurableProperties.PropertyGroups[0].Properties.Add(
new PropertyEntry.Enumerated
{
Name = "Floating point support",
UniqueID = "com.sysprogs.bspoptions.arm.floatmode",
SuggestionList = new PropertyEntry.Enumerated.Suggestion[]
{
new PropertyEntry.Enumerated.Suggestion {
InternalValue = "-mfloat-abi=soft", UserFriendlyName = "Software"
},
new PropertyEntry.Enumerated.Suggestion {
InternalValue = "-mfloat-abi=hard", UserFriendlyName = "Hardware"
},
new PropertyEntry.Enumerated.Suggestion {
InternalValue = "", UserFriendlyName = "Unspecified"
},
}
});
family.CompilationFlags.COMMONFLAGS += " $$com.sysprogs.bspoptions.arm.floatmode$$";
}
}
if (coreName != null)
{
family.AdditionalSystemVars = LoadedBSP.Combine(family.AdditionalSystemVars, new SysVarEntry[] { new SysVarEntry {
Key = "com.sysprogs.bspoptions.arm.core", Value = coreName
} });
}
}
}
internal static void AddCoreSpecificFlags(bool defineConfigurationVariables, MCUFamily family, CortexCore core)
{
string coreName = null;
switch (core)
{
case CortexCore.M0:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m0 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM0" };
coreName = "M0";
break;
case CortexCore.M0Plus:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m0plus -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM0PLUS" };
coreName = "M0";
break;
case CortexCore.M3:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m3 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM3" };
coreName = "M3";
break;
case CortexCore.M4:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m4 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM4" };
family.CompilationFlags.ASFLAGS = "-mfpu=fpv4-sp-d16";
coreName = "M4";
break;
case CortexCore.M7:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m7 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM7" };
coreName = "M7";
break;
default:
throw new Exception("Unsupported core type");
}
if (defineConfigurationVariables)
{
if (core != CortexCore.M0)
{
family.ConfigurableProperties = new PropertyList
{
PropertyGroups = new List<PropertyGroup>
{
new PropertyGroup
{
Properties = new List<PropertyEntry>
{
}
}
}
};
if (core == CortexCore.M4 || core == CortexCore.M7)
{
family.ConfigurableProperties.PropertyGroups[0].Properties.Add(
new PropertyEntry.Enumerated
{
Name = "Floating point support",
UniqueID = "com.sysprogs.bspoptions.arm.floatmode",
SuggestionList = new PropertyEntry.Enumerated.Suggestion[]
{
new PropertyEntry.Enumerated.Suggestion{InternalValue = "-mfloat-abi=soft", UserFriendlyName = "Software"},
new PropertyEntry.Enumerated.Suggestion{InternalValue = "-mfloat-abi=hard", UserFriendlyName = "Hardware"},
new PropertyEntry.Enumerated.Suggestion{InternalValue = "", UserFriendlyName = "Unspecified"},
}
});
family.CompilationFlags.COMMONFLAGS += " $$com.sysprogs.bspoptions.arm.floatmode$$";
}
}
if (coreName != null)
family.AdditionalSystemVars = LoadedBSP.Combine(family.AdditionalSystemVars, new SysVarEntry[] { new SysVarEntry { Key = "com.sysprogs.bspoptions.arm.core", Value = coreName } });
}
}
internal static void AddCoreSpecificFlags(CoreSpecificFlags flagsToDefine, MCUFamily family, CortexCore core)
{
//WARNING: If the proper
string coreName = null, freertosPort = null;
switch (core)
{
case CortexCore.M0:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m0 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM0" };
freertosPort = "ARM_CM0";
coreName = "M0";
break;
case CortexCore.M0Plus:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m0plus -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM0PLUS" };
freertosPort = "ARM_CM0";
coreName = "M0";
break;
case CortexCore.M3:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m3 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM3" };
coreName = "M3";
freertosPort = "ARM_CM3";
break;
case CortexCore.M33:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m33 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM33" };
coreName = "M33";
freertosPort = "ARM_CM33_NTZ/non_secure";
break;
case CortexCore.M33_FPU:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM33" };
coreName = "M33";
freertosPort = "ARM_CM33_NTZ/non_secure";
break;
case CortexCore.M4:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM4" };
freertosPort = "ARM_CM4F";
coreName = "M4";
break;
case CortexCore.M4_NOFPU:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m4 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM4" };
coreName = "M4";
freertosPort = "ARM_CM3";
break;
case CortexCore.M7:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CM7" };
coreName = "M7";
freertosPort = "ARM_CM7/r0p1";
break;
case CortexCore.R5F:
family.CompilationFlags.COMMONFLAGS = "-mcpu=cortex-r5 -mfpu=vfpv3-d16 -mthumb";
family.CompilationFlags.PreprocessorMacros = new string[] { "ARM_MATH_CR5" };
break;
default:
return;
}
if ((flagsToDefine & CoreSpecificFlags.FPU) == CoreSpecificFlags.FPU)
{
if (core == CortexCore.M4 || core == CortexCore.M7 || core == CortexCore.R5F || core == CortexCore.M33_FPU)
{
AddFPModeProperty(flagsToDefine, family);
}
}
List <SysVarEntry> vars = new List <SysVarEntry>();
if (coreName != null)
{
vars.Add(new SysVarEntry {
Key = "com.sysprogs.bspoptions.arm.core", Value = coreName
});
}
if (freertosPort != null)
{
vars.Add(new SysVarEntry {
Key = "com.sysprogs.freertos.default_port", Value = freertosPort
});
}
if (vars.Count > 0)
{
family.AdditionalSystemVars = LoadedBSP.Combine(family.AdditionalSystemVars, vars.ToArray());
}
}
public static HardwareRegisterSet[] GeneratePeripheralRegisterDefinitionsFromHeaderFile(string peripheralHeaderFile, CortexCore core, ParseReportWriter reportWriter)
{
using (var handle = reportWriter.BeginParsingFile(peripheralHeaderFile))
{
var parser = new HeaderFileParser(peripheralHeaderFile, handle);
var parsedFile = parser.ParseHeaderFile();
if (core == CortexCore.M4 && parsedFile.PreprocessorMacros.TryGetValue("HSEM_COMMON", out var hsem))
{
/*
* This is the only relevant use of #ifdef in the STM32 headers:
*
#if defined(CORE_CM4)
#define HSEM_COMMON ((HSEM_Common_TypeDef *) (HSEM_BASE + 0x110UL))
#else
#define HSEM_COMMON ((HSEM_Common_TypeDef *) (HSEM_BASE + 0x100UL))
#endif
*
* Currently, instead of fully parsing it, we just patch it manually for the M4 core.
*/
for (int i = 0; i < hsem.Value.Length; i++)
{
if (hsem.Value[i].Value == "0x100UL")
{
hsem.Value[i].Value = "0x110UL";
}
}
}
var peripherals = LocateStructsReferencedInBaseExpressions(parsedFile);
var subregisterParser = new PeripheralSubregisterParser(handle);
subregisterParser.AttachSubregisterDefinitions(parsedFile, peripherals);
List <HardwareRegisterSet> sets = new List <HardwareRegisterSet>();
string coreFile = $@"../../../CoreReg/OutCorexx/core_{core}.xml";
if (core != CortexCore.Invalid)
{
if (!File.Exists(coreFile))
{
throw new Exception("Unknown ARM core: " + core);
}
sets.Add(XmlTools.LoadObject <HardwareRegisterSet>(coreFile));
}
foreach (var peripheral in peripherals)
{
sets.Add(new HardwareRegisterSet
{
Registers = peripheral.Registers.Select(r => r.ToHardwareRegister(peripheral)).ToArray(),
UserFriendlyName = peripheral.Name,
ExpressionPrefix = peripheral.Name + "->",
});
}
return(sets.ToArray());
}
}
