| public static GetFpuRegister ( int f ) : RegisterStorage | ||
| f | int | |
| return | RegisterStorage | |
private static RegisterOperand GetDoubleRegisterOperand(uint wInstr, int offset)
{
int encodedReg = (int)(wInstr >> offset) & 0x1F;
int reg = ((encodedReg & 1) << 5) | (encodedReg & ~1);
return(new RegisterOperand(Registers.GetFpuRegister(reg)));
}
private void RewriteFitos()
{
var dst = (RegisterOperand)instrCur.Op2;
var fpDst = frame.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var dt = PrimitiveType.Real32;
emitter.Assign(fpDst, emitter.Cast(dt, RewriteOp(instrCur.Op1)));
}
private void RewriteFnegs()
{
var dst = (RegisterOperand)instrCur.Op2;
var src = (RegisterOperand)instrCur.Op1;
var fdst = frame.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var fsrc = frame.EnsureRegister(Registers.GetFpuRegister(src.Register.Number));
emitter.Assign(fdst, emitter.Neg(fsrc));
}
// FPU register
private static Mutator <SparcDisassembler> f(int pos)
{
return((u, d) =>
{
var freg = Registers.GetFpuRegister((int)(u >> pos) & 0x1F);
d.ops.Add(new RegisterOperand(freg));
return true;
});
}
private void RewriteFnegs()
{
var dst = (RegisterOperand)instrCur.Operands[1];
var src = (RegisterOperand)instrCur.Operands[0];
var fdst = binder.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var fsrc = binder.EnsureRegister(Registers.GetFpuRegister(src.Register.Number));
m.Assign(fdst, m.Neg(fsrc));
}
private void RewriteFmovs()
{
var dst = (RegisterOperand)instrCur.Op2;
var src = (RegisterOperand)instrCur.Op1;
var fdst = binder.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var fsrc = binder.EnsureRegister(Registers.GetFpuRegister(src.Register.Number));
m.Assign(fdst, fsrc);
}
private void RewriteFitod()
{
var dst = (RegisterOperand)instrCur.Op2;
var r0 = frame.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var r1 = frame.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number + 1));
var dt = PrimitiveType.Real64;
var fpDst = frame.EnsureSequence(r0.Storage, r1.Storage, dt);
emitter.Assign(fpDst, emitter.Cast(dt, RewriteOp(instrCur.Op1)));
}
private void RewriteFitod()
{
var dst = (RegisterOperand)instrCur.Operands[1];
var r0 = binder.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var r1 = binder.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number + 1));
var dt = PrimitiveType.Real64;
var fpDst = binder.EnsureSequence(dt, r0.Storage, r1.Storage);
m.Assign(fpDst, m.Cast(dt, RewriteOp(instrCur.Operands[0])));
}
private void RewriteFdivs()
{
var dst = (RegisterOperand)instrCur.Op3;
var src1 = (RegisterOperand)instrCur.Op1;
var src2 = (RegisterOperand)instrCur.Op2;
var fdst = frame.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var fsrc1 = frame.EnsureRegister(Registers.GetFpuRegister(src1.Register.Number));
var fsrc2 = frame.EnsureRegister(Registers.GetFpuRegister(src2.Register.Number));
emitter.Assign(fdst, emitter.FDiv(fsrc1, fsrc2));
}
private void RewriteFcmpes()
{
var r1 = (RegisterOperand)instrCur.Op1;
var r2 = (RegisterOperand)instrCur.Op2;
var f1 = frame.EnsureRegister(Registers.GetFpuRegister(r1.Register.Number));
var f2 = frame.EnsureRegister(Registers.GetFpuRegister(r2.Register.Number));
var grf = frame.EnsureFlagGroup(arch.GetFlagGroup("ELGU"));
emitter.Assign(grf, emitter.Cond(emitter.FSub(f1, f2)));
}
private static RegisterOperand GetQuadRegisterOperand(uint wInstr, int offset)
{
int encodedReg = (int)(wInstr >> offset) & 0x1F;
int reg = ((encodedReg & 1) << 5) | (encodedReg & ~1);
if ((reg & 0x3) != 0)
{
return(null);
}
return(new RegisterOperand(Registers.GetFpuRegister(reg)));
}
private void RewriteFcmpes()
{
var r1 = (RegisterOperand)instrCur.Operands[0];
var r2 = (RegisterOperand)instrCur.Operands[1];
var f1 = binder.EnsureRegister(Registers.GetFpuRegister(r1.Register.Number));
var f2 = binder.EnsureRegister(Registers.GetFpuRegister(r2.Register.Number));
var grf = binder.EnsureFlagGroup(arch.GetFlagGroup("ELGU"));
m.Assign(grf, m.Cond(m.FSub(f1, f2)));
}
private void RewriteFadds()
{
var dst = (RegisterOperand)instrCur.Operands[2];
var src1 = (RegisterOperand)instrCur.Operands[0];
var src2 = (RegisterOperand)instrCur.Operands[1];
var fdst = binder.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var fsrc1 = binder.EnsureRegister(Registers.GetFpuRegister(src1.Register.Number));
var fsrc2 = binder.EnsureRegister(Registers.GetFpuRegister(src2.Register.Number));
m.Assign(fdst, m.FAdd(fsrc1, fsrc2));
}
private void RewriteFsubs()
{
var dst = (RegisterOperand)instrCur.Op3;
var src1 = (RegisterOperand)instrCur.Op1;
var src2 = (RegisterOperand)instrCur.Op2;
var fdst = binder.EnsureRegister(Registers.GetFpuRegister(dst.Register.Number));
var fsrc1 = binder.EnsureRegister(Registers.GetFpuRegister(src1.Register.Number));
var fsrc2 = binder.EnsureRegister(Registers.GetFpuRegister(src2.Register.Number));
m.Assign(fdst, m.FSub(fsrc1, fsrc2));
}
private RegisterOperand GetFpuRegisterOperand(uint wInstr, ref int i)
{
// Register operand are followed by their bit offset within the instruction,
// expressed as decimal digits.
int offset = 0;
while (i < fmt.Length && Char.IsDigit(fmt[i]))
{
offset = offset * 10 + (fmt[i++] - '0');
}
return(new RegisterOperand(Registers.GetFpuRegister((wInstr >> offset) & 0x1F)));
}
private RegisterOperand GetDoubleRegisterOperand(uint wInstr, ref int i)
{
int offset = 0;
while (i < fmt.Length && Char.IsDigit(fmt[i]))
{
offset = offset * 10 + (fmt[i++] - '0');
}
int encodedReg = (int)(wInstr >> offset) & 0x1F;
int reg = ((encodedReg & 1) << 5) | (encodedReg & ~1);
return(new RegisterOperand(Registers.GetFpuRegister(reg)));
}
