public void CreateDelegateTest() { var PspConfig = new PspConfig(); var PspEmulatorContext = new PspEmulatorContext(PspConfig); PspEmulatorContext.SetInstanceType<PspMemory, LazyPspMemory>(); var Memory = PspEmulatorContext.GetInstance<PspMemory>(); var Processor = PspEmulatorContext.GetInstance<CpuProcessor>(); var CpuThreadState = new CpuThreadState(Processor); var MipsEmiter = new MipsMethodEmiter(new MipsEmiter(), Processor, 0); CpuThreadState.GPR[1] = 1; CpuThreadState.GPR[2] = 2; CpuThreadState.GPR[3] = 3; MipsEmiter.OP_3REG_Unsigned(1, 2, 2, () => { MipsEmiter.SafeILGenerator.BinaryOperation(SafeBinaryOperator.AdditionSigned); }); MipsEmiter.OP_3REG_Unsigned(0, 2, 2, () => { MipsEmiter.SafeILGenerator.BinaryOperation(SafeBinaryOperator.AdditionSigned); }); MipsEmiter.OP_2REG_IMM_Signed(10, 0, 1000, () => { MipsEmiter.SafeILGenerator.BinaryOperation(SafeBinaryOperator.AdditionSigned); }); MipsEmiter.CreateDelegate()(CpuThreadState); Assert.AreEqual(4, CpuThreadState.GPR[1]); Assert.AreEqual(0, CpuThreadState.GPR[0]); Assert.AreEqual(1000, CpuThreadState.GPR[10]); }
public void nor() { MipsMethodEmiter.OP_3REG_Unsigned(RD, RS, RT, OpCodes.Or, OpCodes.Not); }
public void xor() { MipsMethodEmiter.OP_3REG_Unsigned(RD, RS, RT, OpCodes.Xor); }
///////////////////////////////////////////////////////////////////////////////////////////////// // Logical Operations. ///////////////////////////////////////////////////////////////////////////////////////////////// public void and() { MipsMethodEmiter.OP_3REG_Unsigned(RD, RS, RT, OpCodes.And); }
public void subu() { MipsMethodEmiter.OP_3REG_Unsigned(RD, RS, RT, OpCodes.Sub); }
public void sltu() { MipsMethodEmiter.OP_3REG_Unsigned(RD, RS, RT, OpCodes.Clt_Un); }
public void srlv() { MipsMethodEmiter.OP_3REG_Unsigned(RD, RT, RS, OpCodes.Shr_Un); }