/// <summary>
/// Decodes a P-state from its string representation.
/// </summary>
/// <returns></returns>
public static PState Decode(string text, int pstate)
{
if (string.IsNullOrEmpty(text))
{
return(null);
}
string[] tokens = text.Split(new char[1] {
'|'
}, StringSplitOptions.RemoveEmptyEntries);
if (tokens == null || tokens.Length != _numCores)
{
return(null);
}
var r = new PState();
for (int i = 0; i < _numCores; i++)
{
uint value = uint.Parse(tokens[i], System.Globalization.NumberStyles.HexNumber);
r._msrs[i] = PStateMsr.Decode(value, pstate);
}
return(r);
}
/// <summary>
/// Loads the specified P-state from the cores' MSRs.
/// </summary>
/// <param name="index">Index of the hardware P-state (0-4) to be loaded.</param>
public static PState Load(int index)
{
if (index < 0 || index > 4)
{
throw new ArgumentOutOfRangeException("index");
}
var r = new PState();
for (int i = 0; i < _numCores; i++)
{
r._msrs[i] = PStateMsr.Load(index, i);
}
return(r);
}
public static PStateMsr Decode(uint value, int pstate)
{
//uint maxDiv = (uint)K10Manager.MaxCOF();
uint maxDiv = (uint)K10Manager.CurrCOF();
uint clk = (uint)K10Manager.GetBIOSBusSpeed();
bool turbo = K10Manager.IsTurboSupported();
if (pstate < 3)
{
if (pstate <= K10Manager.GetHighestPState())
{
uint cpuDidLSD = (value >> 0) & 0x0F;
uint cpuDidMSD = (value >> 4) & 0x1F;
uint cpuVid = (value >> 9) & 0x7F;
double Div = cpuDidMSD + (cpuDidLSD * 0.25) + 1;
double DivPLL = cpuDidMSD + (cpuDidLSD * 0.25) + 1;
if (maxDiv == 16 && Div < 2) //E-350 seems to restrict PLL frequencies higher than 1.6GHz
{
DivPLL = 2;
}
else if (maxDiv == 24 && Div < 4 && !turbo) //C-50 seems to restrict PLL frequencies higher than 1.0GHz
{
DivPLL = 4;
}
else if (maxDiv == 24 && Div < 3 && turbo) //C-60 (with turbo seems to restrict PLL frequencies higher than 1.33GHz
{
DivPLL = 3;
}
var msr = new PStateMsr()
{
Divider = Div,
Vid = 1.55 - 0.0125 * cpuVid,
CLK = clk,
PLL = (16 + maxDiv) / DivPLL * clk
};
return(msr);
}
else
{
var msr = new PStateMsr()
{
Divider = 10,
Vid = 0.4,
CLK = 100,
PLL = 1000
};
return(msr);
}
}
else if (pstate == 3)
{
uint nclk = ((value >> 20) & 0x7F);
uint nbVid = ((value >> 12) & 0x7F);
double nclkdiv = 1;
//NCLK Div 2-16 ind 0.25 steps / Div 16-32 in 0.5 steps / Div 32-63 in 1.0 steps
if (nclk >= 8 && nclk <= 63)
{
nclkdiv = nclk * 0.25;
}
else if (nclk >= 64 && nclk <= 95)
{
nclkdiv = (nclk - 64) * 0.5 - 16;
}
else if (nclk >= 96 && nclk <= 127)
{
nclkdiv = nclk - 64;
}
else
{
nclkdiv = 1;
}
var msr = new PStateMsr()
{
Divider = nclkdiv,
Vid = 1.55 - 0.0125 * nbVid,
CLK = clk,
PLL = (16 + maxDiv) / nclkdiv * clk
};
return(msr);
}
else if (pstate == 4)
{
uint nclk = ((value >> 0) & 0x7F);
uint nbVid = ((value >> 8) & 0x7F);
double nclkdiv = 1;
//NCLK Div 2-16 ind 0.25 steps / Div 16-32 in 0.5 steps / Div 32-63 in 1.0 steps
if (nclk >= 8 && nclk <= 63)
{
nclkdiv = nclk * 0.25;
}
else if (nclk >= 64 && nclk <= 95)
{
nclkdiv = (nclk - 64) * 0.5 - 16;
}
else if (nclk >= 96 && nclk <= 127)
{
nclkdiv = nclk - 64;
}
else
{
nclkdiv = 1;
}
var msr = new PStateMsr()
{
Divider = nclkdiv,
Vid = 1.55 - 0.0125 * nbVid,
CLK = clk,
PLL = (16 + maxDiv) / nclkdiv * clk
};
return(msr);
}
else
{
var msr = new PStateMsr()
{
Divider = 10,
Vid = 0.4,
CLK = 100,
PLL = 1000
};
return(msr);
}
}
public static PStateMsr Decode(uint value, int pstate)
{
//uint maxDiv = (uint)K10Manager.MaxCOF();
uint maxDiv = (uint)K10Manager.CurrCOF();
uint clk = (uint)K10Manager.GetBIOSBusSpeed();
bool turbo = K10Manager.IsTurboSupported();
if (pstate < 3)
{
if (pstate <= K10Manager.GetHighestPState())
{
uint cpuDidLSD = (value >> 0) & 0x0F;
uint cpuDidMSD = (value >> 4) & 0x1F;
uint cpuVid = (value >> 9) & 0x7F;
double Div = cpuDidMSD + (cpuDidLSD * 0.25) + 1;
double DivPLL = cpuDidMSD + (cpuDidLSD * 0.25) + 1;
if (maxDiv == 16 && Div < 2) //E-350 seems to restrict PLL frequencies higher than 1.6GHz
{
DivPLL = 2;
}
else if (maxDiv == 24 && Div < 4 && !turbo) //C-50 seems to restrict PLL frequencies higher than 1.0GHz
{
DivPLL = 4;
}
else if (maxDiv == 24 && Div < 3 && turbo) //C-60 (with turbo seems to restrict PLL frequencies higher than 1.33GHz
{
DivPLL = 3;
}
var msr = new PStateMsr()
{
Divider = Div,
Vid = 1.55 - 0.0125 * cpuVid,
CLK = clk,
PLL = (16 + maxDiv) / DivPLL * clk
};
return msr;
}
else
{
var msr = new PStateMsr()
{
Divider = 10,
Vid = 0.4,
CLK = 100,
PLL = 1000
};
return msr;
}
}
else if (pstate == 3)
{
uint nclk = ((value >> 20) & 0x7F);
uint nbVid = ((value >> 12) & 0x7F);
double nclkdiv = 1;
//NCLK Div 2-16 ind 0.25 steps / Div 16-32 in 0.5 steps / Div 32-63 in 1.0 steps
if (nclk >= 8 && nclk <= 63) nclkdiv = nclk * 0.25;
else if (nclk >= 64 && nclk <= 95) nclkdiv = (nclk - 64) * 0.5 - 16;
else if (nclk >= 96 && nclk <= 127) nclkdiv = nclk - 64;
else nclkdiv = 1;
var msr = new PStateMsr()
{
Divider = nclkdiv,
Vid = 1.55 - 0.0125 * nbVid,
CLK = clk,
PLL = (16 + maxDiv) / nclkdiv * clk
};
return msr;
}
else if (pstate == 4)
{
uint nclk = ((value >> 0) & 0x7F);
uint nbVid = ((value >> 8) & 0x7F);
double nclkdiv = 1;
//NCLK Div 2-16 ind 0.25 steps / Div 16-32 in 0.5 steps / Div 32-63 in 1.0 steps
if (nclk >= 8 && nclk <= 63) nclkdiv = nclk * 0.25;
else if (nclk >= 64 && nclk <= 95) nclkdiv = (nclk - 64) * 0.5 - 16;
else if (nclk >= 96 && nclk <= 127) nclkdiv = nclk - 64;
else nclkdiv = 1;
var msr = new PStateMsr()
{
Divider = nclkdiv,
Vid = 1.55 - 0.0125 * nbVid,
CLK = clk,
PLL = (16 + maxDiv) / nclkdiv * clk
};
return msr;
}
else
{
var msr = new PStateMsr()
{
Divider = 10,
Vid = 0.4,
CLK = 100,
PLL = 1000
};
return msr;
}
}
