void runppu(int x)
{
//run one ppu cycle at a time so we can interact with the ppu and clockPPU at high granularity
for (int i = 0; i < x; i++)
{
race_2006 = false;
if (install_2006 > 0)
{
install_2006--;
if (install_2006 == 0)
{
ppur.install_latches();
//nes.LogLine("addr wrote vt = {0}, ht = {1}", ppur._vt, ppur._ht);
//normally the address isnt observed by the board till it gets clocked by a read or write.
//but maybe thats just because a ppu read/write shoves it on the address bus
//apparently this shoves it on the address bus, too, or else blargg's mmc3 tests dont pass
//ONLY if the ppu is not rendering
if (ppur.status.sl == 241 || !PPUON)
{
nes.Board.AddressPPU(ppur.get_2007access());
}
race_2006 = true;
}
}
ppur.status.cycle++;
is_even_cycle = !is_even_cycle;
//might not actually run a cpu cycle if there are none to be run right now
nes.RunCpuOne();
if (install_2001 > 0)
{
install_2001--;
if (install_2001 == 0)
{
show_bg_new = reg_2001.show_bg;
show_obj_new = reg_2001.show_obj;
}
}
if (Reg2002_vblank_active_pending)
{
//if (Reg2002_vblank_active_pending)
Reg2002_vblank_active = 1;
Reg2002_vblank_active_pending = false;
}
if (Reg2002_vblank_clear_pending)
{
Reg2002_vblank_active = 0;
Reg2002_vblank_clear_pending = false;
}
nes.Board.ClockPPU();
}
}
void runppu(int x)
{
//run one ppu cycle at a time so we can interact with the ppu and clockPPU at high granularity
for (int i = 0; i < x; i++)
{
ppur.status.cycle++;
is_even_cycle = !is_even_cycle;
//might not actually run a cpu cycle if there are none to be run right now
nes.RunCpuOne();
if (Reg2002_vblank_active_pending)
{
//if (Reg2002_vblank_active_pending)
Reg2002_vblank_active = 1;
Reg2002_vblank_active_pending = false;
}
if (Reg2002_vblank_clear_pending)
{
Reg2002_vblank_active = 0;
Reg2002_vblank_clear_pending = false;
}
nes.Board.ClockPPU();
}
}
void runppu()
{
//run one ppu cycle at a time so we can interact with the ppu and clockPPU at high granularity
if (install_2006 > 0)
{
install_2006--;
if (install_2006 == 0)
{
if (!race_2006)
{
ppur.install_latches();
}
else
{
race_2006_2 = true;
}
//nes.LogLine("addr wrote vt = {0}, ht = {1}", ppur._vt, ppur._ht);
//normally the address isnt observed by the board till it gets clocked by a read or write.
//but maybe thats just because a ppu read/write shoves it on the address bus
//apparently this shoves it on the address bus, too, or else blargg's mmc3 tests dont pass
//ONLY if the ppu is not rendering
if (ppur.status.sl >= 241 || !PPUON)
{
nes.Board.AddressPPU(ppur.get_2007access());
}
}
}
race_2006 = false;
if (install_2001 > 0)
{
install_2001--;
if (install_2001 == 0)
{
show_bg_new = reg_2001.show_bg;
show_obj_new = reg_2001.show_obj;
}
}
ppur.status.cycle++;
is_even_cycle = !is_even_cycle;
if (PPUON && ppur.status.cycle >= 257 && ppur.status.cycle <= 320 && ppur.status.sl <= 240)
{
reg_2003 = 0;
}
// Here we execute a CPU instruction if enough PPU cycles have passed
// also do other things that happen at instruction level granularity
cpu_stepcounter++;
if (cpu_stepcounter == nes.cpu_sequence[cpu_step])
{
cpu_step++;
if (cpu_step == 5)
{
cpu_step = 0;
}
cpu_stepcounter = 0;
// this is where the CPU instruction is called
nes.RunCpuOne();
// decay the ppu bus, approximating real behaviour
PpuOpenBusDecay(DecayType.None);
// Check for NMIs
if (NMI_PendingInstructions > 0)
{
NMI_PendingInstructions--;
if (NMI_PendingInstructions <= 0)
{
nes.cpu.NMI = true;
}
}
}
if (Reg2002_vblank_active_pending)
{
Reg2002_vblank_active = 1;
Reg2002_vblank_active_pending = false;
}
if (Reg2002_vblank_clear_pending)
{
Reg2002_vblank_active = 0;
Reg2002_vblank_clear_pending = false;
}
if (HasClockPPU)
{
nes.Board.ClockPPU();
}
_totalCycles += 1;
}
