//address_map_bank_device& set_shift(u32 shift) { m_shift = shift; return *this; }
public address_map_bank_device set_options(endianness_t endianness, u8 data_width, u8 addr_width, u32 stride = 1)
{
set_endianness(endianness);
set_data_width(data_width);
set_addr_width(addr_width);
set_stride(stride);
return(this);
}
Action <int, u32> m_write_entry; //void (memory_array::*m_write_entry)(int, u32);
// construction/destruction
//-------------------------------------------------
// memory_array - constructor
//-------------------------------------------------
public memory_array()
{
m_base = null;
m_bytes = 0;
m_membits = 0;
m_endianness = ENDIANNESS_LITTLE;
m_bytes_per_entry = 0;
m_read_entry = null;
m_write_entry = null;
}
// construction/destruction
address_map_bank_device(machine_config mconfig, string tag, device_t owner, u32 clock)
: base(mconfig, ADDRESS_MAP_BANK, tag, owner, clock)
{
m_class_interfaces.Add(new device_memory_interface_address_map_bank(mconfig, this)); //device_memory_interface(mconfig, *this),
m_dimemory = GetClassInterface <device_memory_interface_address_map_bank>();
m_endianness = ENDIANNESS_NATIVE;
m_data_width = 0;
m_addr_width = 32;
m_stride = 1;
m_program = null;
m_offset = 0;
m_shift = 0;
}
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, black_t, u32 entries = 0U);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, mono_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, mono_inv_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, mono_hi_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, rgb_3b_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, rbg_3b_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, grb_3b_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, gbr_3b_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, brg_3b_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, bgr_3b_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, rgb_555_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, grb_555_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, bgr_555_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, rgb_565_t);
//palette_device(const machine_config &mconfig, const char *tag, device_t *owner, bgr_565_t);
public palette_device(machine_config mconfig, string tag, device_t owner, u32 clock = 0)
: base(mconfig, PALETTE, tag, owner, 0)
{
m_class_interfaces.Add(new device_palette_interface_palette_device(mconfig, this)); //device_palette_interface(mconfig, *this),
m_dipalette = GetClassInterface <device_palette_interface_palette_device>();
m_entries = 0;
m_indirect_entries = 0;
m_enable_shadows = false;
m_enable_hilights = false;
m_membits = 0;
m_membits_supplied = false;
m_endianness = ENDIANNESS_BIG;
m_endianness_supplied = false;
m_prom_region = new optional_memory_region(this, finder_base.DUMMY_TAG);
m_init = null;
m_raw_to_rgb = null;
}
//memory_array(void *base, u32 bytes, int membits, endianness_t endianness, int bpe) { set(base, bytes, membits, endianness, bpe); }
//template <typename _Type> memory_array(std::vector<_Type> &array, endianness_t endianness, int bpe) { set(array, endianness, bpe); }
//memory_array(const address_space &space, void *base, u32 bytes, int bpe) { set(space, base, bytes, bpe); }
//memory_array(const memory_share &share, int bpe) { set(share, bpe); }
//memory_array(const memory_array &array) { set(array); }
// configuration
//-------------------------------------------------
// set - configure the parameters
//-------------------------------------------------
public void set(PointerU8 base_, u32 bytes, int membits, endianness_t endianness, int bpe) //void set(void *base, u32 bytes, int membits, endianness_t endianness, int bpe);
{
// validate inputs
assert(base_ != null);
assert(bytes > 0);
assert(membits == 8 || membits == 16 || membits == 32 || membits == 64);
assert(bpe == 1 || bpe == 2 || bpe == 4);
// populate direct data
m_base = base_;
m_bytes = bytes;
m_membits = membits;
m_endianness = endianness;
m_bytes_per_entry = bpe;
// derive data
switch (bpe * 1000 + membits * 10 + (endianness == ENDIANNESS_LITTLE ? 0 : 1))
{
case 1 * 1000 + 8 * 10 + 0: m_read_entry = read8_from_8; m_write_entry = write8_to_8; break;
case 1 * 1000 + 8 * 10 + 1: m_read_entry = read8_from_8; m_write_entry = write8_to_8; break;
case 1 * 1000 + 16 * 10 + 0: m_read_entry = read8_from_16le; m_write_entry = write8_to_16le; break;
case 1 * 1000 + 16 * 10 + 1: m_read_entry = read8_from_16be; m_write_entry = write8_to_16be; break;
case 1 * 1000 + 32 * 10 + 0: m_read_entry = read8_from_32le; m_write_entry = write8_to_32le; break;
case 1 * 1000 + 32 * 10 + 1: m_read_entry = read8_from_32be; m_write_entry = write8_to_32be; break;
case 1 * 1000 + 64 * 10 + 0: m_read_entry = read8_from_64le; m_write_entry = write8_to_64le; break;
case 1 * 1000 + 64 * 10 + 1: m_read_entry = read8_from_64be; m_write_entry = write8_to_64be; break;
case 2 * 1000 + 8 * 10 + 0: m_read_entry = read16_from_8le; m_write_entry = write16_to_8le; break;
case 2 * 1000 + 8 * 10 + 1: m_read_entry = read16_from_8be; m_write_entry = write16_to_8be; break;
case 2 * 1000 + 16 * 10 + 0: m_read_entry = read16_from_16; m_write_entry = write16_to_16; break;
case 2 * 1000 + 16 * 10 + 1: m_read_entry = read16_from_16; m_write_entry = write16_to_16; break;
case 2 * 1000 + 32 * 10 + 0: m_read_entry = read16_from_32le; m_write_entry = write16_to_32le; break;
case 2 * 1000 + 32 * 10 + 1: m_read_entry = read16_from_32be; m_write_entry = write16_to_32be; break;
case 2 * 1000 + 64 * 10 + 0: m_read_entry = read16_from_64le; m_write_entry = write16_to_64le; break;
case 2 * 1000 + 64 * 10 + 1: m_read_entry = read16_from_64be; m_write_entry = write16_to_64be; break;
case 4 * 1000 + 8 * 10 + 0: m_read_entry = read32_from_8le; m_write_entry = write32_to_8le; break;
case 4 * 1000 + 8 * 10 + 1: m_read_entry = read32_from_8be; m_write_entry = write32_to_8be; break;
case 4 * 1000 + 16 * 10 + 0: m_read_entry = read32_from_16le; m_write_entry = write32_to_16le; break;
case 4 * 1000 + 16 * 10 + 1: m_read_entry = read32_from_16be; m_write_entry = write32_to_16be; break;
case 4 * 1000 + 32 * 10 + 0: m_read_entry = read32_from_32; m_write_entry = write32_to_32; break;
case 4 * 1000 + 32 * 10 + 1: m_read_entry = read32_from_32; m_write_entry = write32_to_32; break;
case 4 * 1000 + 64 * 10 + 0: m_read_entry = read32_from_64le; m_write_entry = write32_to_64le; break;
case 4 * 1000 + 64 * 10 + 1: m_read_entry = read32_from_64be; m_write_entry = write32_to_64be; break;
default: throw new emu_fatalerror("Illegal memory bits/bus width combo in memory_array");
}
}
public void set_endianness(endianness_t endianness)
{
set(m_base, m_bytes, m_membits, endianness, m_bytes_per_entry);
}
} //template <typename... T> address_map_bank_device& set_map(T &&... args) { set_addrmap(0, std::forward<T>(args)...); return *this; }
address_map_bank_device set_endianness(endianness_t endianness)
{
m_endianness = endianness; return(this);
}
