protected PIC16RewriterBase(PICArchitecture arch, PICDisassemblerBase disasm, PICProcessorState state, IStorageBinder binder, IRewriterHost host) : base(arch, disasm, state, binder, host) { }
protected Identifier Fsr2; // cached FSR2 register identifier protected PIC18RewriterBase(PICArchitecture arch, PICDisassemblerBase disasm, PICProcessorState state, IStorageBinder binder, IRewriterHost host) : base(arch, disasm, state, binder, host) { Fsr2 = binder.EnsureRegister(PIC18Registers.FSR2); }
private PIC18EggRewriter(PICArchitecture arch, PICDisassemblerBase dasm, PICProcessorState state, IStorageBinder binder, IRewriterHost host) : base(arch, dasm, state, binder, host) { }
public static PICRewriter Create(PICArchitecture arch, PICDisassemblerBase dasm, PICProcessorState state, IStorageBinder binder, IRewriterHost host) { return(new PIC18EggRewriter( arch ?? throw new ArgumentNullException(nameof(arch)), dasm ?? throw new ArgumentNullException(nameof(dasm)), state ?? throw new ArgumentNullException(nameof(state)), binder ?? throw new ArgumentNullException(nameof(binder)), host ?? throw new ArgumentNullException(nameof(host)) )); }
public override PICRewriter CreateRewriter(PICArchitecture arch, PICDisassemblerBase dasm, PICProcessorState state, IStorageBinder binder, IRewriterHost host) => PIC18EnhancedRewriter.Create(arch, dasm, state, binder, host);