public void ParsingIndexedAddressingMode(int index) { int width = opcode.GetInstWidth(opcode.inst); opcode.scale = 1; opcode.BaseReg = Addressing.none; opcode.IndexReg = Addressing.none; opcode.MemImm = opcode.TempImm; opcode.TempImm = 0; opcode.Register[index] = Addressing.mem; lex.Match(Token.leftbracket); Token tk = lex.NextToken(); if (tk == Token.percent) { Addressing addressing = ParsingRegister(); if (addressing == Addressing.none) { return; } if (width == 1) { if (addressing != Addressing.bp) { Error("in 8bit inst base register only can assigned bx or bp"); lex.SkipLine(); return; } } else if (width == 2) { if (addressing != Addressing.bx && addressing != Addressing.bp) { Error("in 16bit inst base register only can assigned bx, bp"); lex.SkipLine(); return; } } else if (width == 4) { //理论上基址寄存器就是这几个,但是,看gcc生成的汇编似乎所有的寄存器都可以的,先去掉 //if (addressing != Addressing.ebx||addressing != Addressing.ebp||addressing != Addressing.bx||addressing != Addressing.bp) { // Error("in 32bit inst base register only can assigned ebx, ebp, bx, bp"); // lex.SkipLine(); // return; //} } if (opcode.SegReg == Addressing.none) { if (addressing == Addressing.ebp || addressing == Addressing.bp || addressing == Addressing.esp || addressing == Addressing.sp) { opcode.SegReg = Addressing.ss; } else { opcode.SegReg = Addressing.ds; } } opcode.BaseReg = addressing; tk = lex.NextToken(); if (tk == Token.comma) { lex.Match(Token.comma); tk = lex.NextToken(); if (tk == Token.percent) { addressing = ParsingRegister(); if (addressing == Addressing.none) { return; } if (width == 1) { if (addressing != Addressing.si && addressing != Addressing.di && addressing != Addressing.sp) { Error("in 8bit inst index register only can assigned si, di or sp"); lex.SkipLine(); return; } } else if (width == 2) { if (addressing != Addressing.ax && addressing != Addressing.cx && addressing != Addressing.dx || addressing != Addressing.si && addressing != Addressing.di && addressing != Addressing.sp) { Error("in 16bit inst index register only can assigned ax, cx, dx, si, di, sp"); lex.SkipLine(); return; } } else if (width == 4) { if (addressing != Addressing.eax && addressing != Addressing.ecx && addressing != Addressing.edx && addressing != Addressing.esi && addressing != Addressing.edi && addressing != Addressing.esp && addressing != Addressing.ax && addressing != Addressing.cx && addressing != Addressing.dx && addressing != Addressing.si && addressing != Addressing.di && addressing != Addressing.sp) { Error("in 32bit inst index register only can assigned eax, ecx, edx, esi, edi, esp, ax, cx, dx, si, di, sp"); lex.SkipLine(); return; } } opcode.IndexReg = addressing; tk = lex.NextToken(); if (tk == Token.comma) { lex.Match(Token.comma); tk = lex.NextToken(); if (tk == Token.Number) { int scale = Int32.Parse(lex.GetTokenString()); lex.Match(Token.Number); if (scale == 1) { opcode.scale = 1; } else if (scale == 2) { opcode.scale = 2; } else if (scale == 4) { opcode.scale = 4; } else if (scale == 8) { opcode.scale = 8; } else { Error("scale value is only 1, 2, 4, 8"); lex.SkipLine(); return; } } else { Error("need scale value"); lex.SkipLine(); return; } lex.Match(Token.rightbracket); } else if (tk == Token.rightbracket) { lex.Match(Token.rightbracket); opcode.scale = 1; } else { Error("‘)’ expect but" + lex.GetTokenString() + " found"); lex.SkipLine(); return; } } else { Error("register expect but" + lex.GetTokenString() + " found"); lex.SkipLine(); return; } } else if (tk == Token.rightbracket) { lex.Match(Token.rightbracket); } else { Error("right bracket expect but" + lex.GetTokenString() + " found"); lex.SkipLine(); return; } } else if (tk == Token.comma) { lex.Match(Token.comma); tk = lex.NextToken(); if (tk == Token.percent) { Addressing addressing = ParsingRegister(); if (addressing == Addressing.none) { return; } if (width == 1) { if (addressing != Addressing.si || addressing != Addressing.di || addressing != Addressing.sp) { Error("in 8bit inst index register only can assigned si, di or sp"); lex.SkipLine(); return; } } else if (width == 2) { if (addressing != Addressing.ax || addressing != Addressing.cx || addressing != Addressing.dx || addressing != Addressing.si || addressing != Addressing.di || addressing != Addressing.sp) { Error("in 16bit inst index register only can assigned ax, cx, dx, si, di, sp"); lex.SkipLine(); return; } } else if (width == 4) { /* * if (addressing != Addressing.eax || addressing != Addressing.ecx || addressing != Addressing.edx|| * addressing != Addressing.esi || addressing != Addressing.edi || addressing != Addressing.esp || * addressing != Addressing.ax || addressing != Addressing.cx || addressing != Addressing.dx || addressing != Addressing.si || addressing != Addressing.di || addressing != Addressing.sp) { ||Error("in 32bit inst index register only can assigned eax, ecx, edx, esi, edi, esp, ax, cx, dx, si, di, sp"); ||lex.SkipLine(); ||return; ||} */ } if (opcode.SegReg == Addressing.none) { if (addressing == Addressing.ebp || addressing == Addressing.bp || addressing == Addressing.esp || addressing == Addressing.sp) { opcode.SegReg = Addressing.ss; } else { opcode.SegReg = Addressing.ds; } } opcode.IndexReg = addressing; tk = lex.NextToken(); if (tk == Token.comma) { lex.Match(Token.comma); tk = lex.NextToken(); if (tk == Token.Number) { int scale = Int32.Parse(lex.GetTokenString()); lex.Match(Token.Number); if (scale == 1) { opcode.scale = 1; } else if (scale == 2) { opcode.scale = 1; } else if (scale == 4) { opcode.scale = 1; } else if (scale == 8) { opcode.scale = 1; } else { Error("scale value is only 1, 2, 4, 8"); lex.SkipLine(); return; } } else { Error("need scale value"); lex.SkipLine(); return; } lex.Match(Token.rightbracket); } else if (tk == Token.rightbracket) { opcode.scale = 1; lex.Match(Token.rightbracket); } else { Error("')' expect but " + lex.GetTokenString() + " found"); lex.SkipLine(); } } } }