public void WriteMemory(ushort addr, byte value) { MemoryCallbacks.CallWrites(addr, "System Bus"); if (addr < 0x8000) { } else if (addr < 0xC800) { } else if (addr < 0xD000) { RAM[(addr - 0xC800) & 0x3FF] = value; } else if (addr < 0xD800) { Write_Registers(addr & 0xF, value); } else if (addr < 0xE000) { } else if (addr < 0xF000) { } else { } }
private void WriteHook(uint addr, byte val) { MemoryCallbacks.CallWrites(addr); // we RefreshMemoryCallbacks() after the trigger in case the trigger turns itself off at that point // EDIT: for now, theres some IPC re-entrancy problem // RefreshMemoryCallbacks(); }
public void WriteMemory(ushort addr, byte value) { if (addr < 0x0800) { ram[addr] = value; } else if (addr < 0x2000) { ram[addr & 0x7FF] = value; } else if (addr < 0x4000) { Board.WriteReg2xxx(addr, value); } else if (addr < 0x4020) { WriteReg(addr, value); //we're not rebasing the register just to keep register names canonical } else if (addr < 0x6000) { Board.WriteEXP(addr - 0x4000, value); } else if (addr < 0x8000) { Board.WriteWRAM(addr - 0x6000, value); } else { Board.WritePRG(addr - 0x8000, value); } MemoryCallbacks.CallWrites(addr); }
private void SetCallbacks() { _machine.Memory.ReadCallback = (addr) => MemoryCallbacks.CallReads(addr, "System Bus"); _machine.Memory.WriteCallback = (addr) => MemoryCallbacks.CallWrites(addr, "System Bus"); _machine.Memory.ExecuteCallback = (addr) => MemoryCallbacks.CallExecutes(addr, "System Bus"); _machine.Memory.InputCallback = InputCallbacks.Call; }
private void InitMemCallbacks() { ExecCallback = new LibGPGX.mem_cb(a => MemoryCallbacks.CallExecutes(a, "M68K BUS")); ReadCallback = new LibGPGX.mem_cb(a => MemoryCallbacks.CallReads(a, "M68K BUS")); WriteCallback = new LibGPGX.mem_cb(a => MemoryCallbacks.CallWrites(a, "M68K BUS")); _memoryCallbacks.ActiveChanged += RefreshMemCallbacks; }
public void WriteMemoryWrapper(ushort addr, byte value) { if (MemoryCallbacks != null) { MemoryCallbacks.CallWrites(addr); } WriteMemory(addr, value); }
void InitCallbacks() { padcb = new LibVBANext.StandardCallback(() => InputCallbacks.Call()); fetchcb = new LibVBANext.AddressCallback((addr) => MemoryCallbacks.CallExecutes(addr)); readcb = new LibVBANext.AddressCallback((addr) => MemoryCallbacks.CallReads(addr)); writecb = new LibVBANext.AddressCallback((addr) => MemoryCallbacks.CallWrites(addr)); tracecb = new LibVBANext.TraceCallback((addr, opcode) => Tracer.Put(Trace(addr, opcode))); _inputCallbacks.ActiveChanged += SyncPadCallback; _memorycallbacks.ActiveChanged += SyncMemoryCallbacks; }
internal void WriteMemory(ushort addr, byte value) { if (addr != LastAddress) { DistinctAccessCount++; LastAddress = addr; } _mapper.WriteMemory((ushort)(addr & 0x1FFF), value); MemoryCallbacks.CallWrites(addr); }
private void WriteMemory(ushort addr, byte value) { if (addr != _lastAddress) { DistinctAccessCount++; _lastAddress = addr; } _mapper.WriteMemory((ushort)(addr & 0x1FFF), value); MemoryCallbacks.CallWrites(addr, "System Bus"); }
public void WriteMemory(ushort addr, byte value) { MemoryCallbacks.CallWrites(addr); if ((addr & 0xFCE0) == 0) { // return TIA registers or control register if it is still unlocked if ((A7800_control_register & 0x1) == 0) { A7800_control_register = value; } else { TIA_regs[addr & 0x1F] = value; tia.WriteMemory((ushort)(addr & 0x1F), value, false); } } else if ((addr & 0xFCE0) == 0x20) { if ((A7800_control_register & 0x2) > 0) { // register 8 is read only and controlled by Maria var temp = addr & 0x1F; if (temp != 8) { Maria_regs[temp] = value; } if (temp == 4) // WSYNC { cpu.RDY = false; } } else { // TODO: What if Maria is off? } } else if ((addr & 0xFF80) == 0x280) { m6532.WriteMemory(addr, value); } else if ((addr & 0xFE80) == 0x480) { RAM_6532[addr & 0x7F] = value; } else if ((addr >= 0x1800) && (addr < 0x2800)) { RAM[addr - 0x1800] = value; } else if ((addr >= 0x40) && (addr < 0x100)) { // RAM block 0 RAM[addr - 0x40 + 0x840] = value; } else if ((addr >= 0x140) && (addr < 0x200)) { // RAM block 1 RAM[addr - 0x140 + 0x940] = value; } else if ((addr >= 0x2800) && (addr < 0x3000)) { RAM[(addr & 0x7FF) + 0x800] = value; } else if ((addr >= 0x3000) && (addr < 0x4000)) { // could be either RAM mirror or ROM mapper.WriteMemory(addr, value); } else if ((addr >= 0x400) && (addr < 0x480)) { // cartridge space available mapper.WriteMemory(addr, value); } else if ((addr >= 0x500) && (addr < 0x1800)) { // cartridge space available mapper.WriteMemory(addr, value); } else { mapper.WriteMemory(addr, value); } }
public void WriteMemory(ushort addr, byte value) { MemoryCallbacks.CallWrites(addr, "System Bus"); addr_access = addr; if (ppu.DMA_start) { // some of gekkio's tests require this to be accessible during DMA if ((addr >= 0xE000) && (addr < 0xF000)) { RAM[addr - 0xE000] = value; } else if ((addr >= 0xF000) && (addr < 0xFE00)) { RAM[(RAM_Bank * 0x1000) + (addr - 0xF000)] = value; } else if ((addr >= 0xFE00) && (addr < 0xFEA0) && ppu.DMA_OAM_access) { OAM[addr - 0xFE00] = value; } else if ((addr >= 0xFF00) && (addr < 0xFF80)) // The game GOAL! Requires Hardware Regs to be accessible { Write_Registers(addr, value); } else if ((addr >= 0xFF80)) { ZP_RAM[addr - 0xFF80] = value; } return; } if (addr < 0x900) { if (addr < 0x100) { if ((GB_bios_register & 0x1) == 0) { // No Writing to BIOS } else { mapper.WriteMemory(addr, value); } } else if (addr >= 0x200) { if (((GB_bios_register & 0x1) == 0) && is_GBC) { // No Writing to BIOS } else { mapper.WriteMemory(addr, value); } } else { mapper.WriteMemory(addr, value); } } else if (addr < 0x8000) { mapper.WriteMemory(addr, value); } else if (addr < 0xA000) { if (ppu.VRAM_access_write) { VRAM[(VRAM_Bank * 0x2000) + (addr - 0x8000)] = value; } } else if (addr < 0xC000) { mapper.WriteMemory(addr, value); } else if (addr < 0xD000) { RAM[addr - 0xC000] = value; } else if (addr < 0xE000) { RAM[(RAM_Bank * 0x1000) + (addr - 0xD000)] = value; } else if (addr < 0xF000) { RAM[addr - 0xE000] = value; } else if (addr < 0xFE00) { RAM[(RAM_Bank * 0x1000) + (addr - 0xF000)] = value; } else if (addr < 0xFEA0) { if (ppu.OAM_access_write) { OAM[addr - 0xFE00] = value; } } else if (addr < 0xFF00) { // unmapped, writing has no effect } else if (addr < 0xFF80) { Write_Registers(addr, value); } else if (addr < 0xFFFF) { ZP_RAM[addr - 0xFF80] = value; } else { Write_Registers(addr, value); } }
public void WriteMemory(ushort addr, byte value) { MemoryCallbacks.CallWrites(addr, "System Bus"); if ((addr & 0xFCE0) == 0) { // return TIA registers or control register if it is still unlocked if ((A7800_control_register & 0x1) == 0) { A7800_control_register = value; } else { slow_access = true; tia.WriteMemory((ushort)(addr & 0x1F), value, false); } } else if ((addr & 0xFCE0) == 0x20) { if ((A7800_control_register & 0x2) > 0) { // register 8 is read only and controlled by Maria var temp = addr & 0x1F; if (temp != 8) { Maria_regs[temp] = value; } if (temp == 4) // WSYNC { cpu.RDY = false; } /* * for (int i = 0; i < 0x20; i++) * { * Console.Write(Maria_regs[i]); * Console.Write(" "); * } * Console.WriteLine(maria.scanline); */ } else { // TODO: What if Maria is off? } } else if ((addr & 0xFF80) == 0x280) { slow_access = true; m6532.WriteMemory(addr, value); } else if ((addr & 0xFE80) == 0x480) { slow_access = true; RAM_6532[addr & 0x7F] = value; } else if ((addr >= 0x1800) && (addr < 0x2800)) { RAM[addr - 0x1800] = value; } else if ((addr >= 0x40) && (addr < 0x100)) { // RAM block 0 RAM[addr - 0x40 + 0x840] = value; } else if ((addr >= 0x140) && (addr < 0x200)) { // RAM block 1 RAM[addr - 0x140 + 0x940] = value; } else if ((addr >= 0x2800) && (addr < 0x3000)) { // this mirror evidently does not exist on hardware despite being in the documentation //RAM[(addr & 0x7FF) + 0x800] = value; } else if ((addr >= 0x3000) && (addr < 0x4000)) { // could be either RAM mirror or ROM mapper.WriteMemory(addr, value); } else if ((addr >= 0x400) && (addr < 0x480)) { // cartridge space available mapper.WriteMemory(addr, value); } else if ((addr >= 0x500) && (addr < 0x1800)) { // cartridge space available mapper.WriteMemory(addr, value); } else { mapper.WriteMemory(addr, value); } }
void WriteCallback(uint addr) { MemoryCallbacks.CallWrites(addr, "System Bus"); }
public void WriteMemory(ushort addr, byte value) { MemoryCallbacks.CallWrites(addr, "System Bus"); if (ppu.DMA_start) { if ((addr >= 0xE000) && (addr < 0xFE00)) { RAM[addr - 0xE000] = value; // some of gekkio's tests require this to be accessible during DMA } else if ((addr >= 0xFE00) && (addr < 0xFEA0) && ppu.DMA_OAM_access) { OAM[addr - 0xFE00] = value; } else if ((addr >= 0xFF00) && (addr < 0xFF80)) // The game GOAL! Requires Hardware Regs to be accessible { Write_Registers(addr, value); } else if ((addr >= 0xFF80)) { ZP_RAM[addr - 0xFF80] = value; } return; } if (addr < 0x100) { // return Either BIOS ROM or Game ROM if ((GB_bios_register & 0x1) == 0) { // Can't write to BIOS region } else { mapper.WriteMemory(addr, value); } } else if (addr < 0x8000) { mapper.WriteMemory(addr, value); } else if (addr < 0x9800) { if (ppu.VRAM_access_write) { CHR_RAM[addr - 0x8000] = value; } } else if (addr < 0x9C00) { if (ppu.VRAM_access_write) { BG_map_1[addr - 0x9800] = value; } } else if (addr < 0xA000) { if (ppu.VRAM_access_write) { BG_map_2[addr - 0x9C00] = value; } } else if (addr < 0xC000) { mapper.WriteMemory(addr, value); } else if (addr < 0xE000) { RAM[addr - 0xC000] = value; } else if (addr < 0xFE00) { RAM[addr - 0xE000] = value; } else if (addr < 0xFEA0) { if (ppu.OAM_access_write) { OAM[addr - 0xFE00] = value; } } else if (addr < 0xFF00) { // unmapped, writing has no effect } else if (addr < 0xFF80) { Write_Registers(addr, value); } else if (addr < 0xFFFF) { ZP_RAM[addr - 0xFF80] = value; } else { Write_Registers(addr, value); } }
private void WriteMemory(ushort addr, byte value) { WriteMemoryMapper(addr, value); MemoryCallbacks.CallWrites(addr, "System Bus"); }
private void WriteHook_SMP(uint addr, byte val) { MemoryCallbacks.CallWrites(addr, "SMP"); }
void WriteCallback(uint addr) { MemoryCallbacks.CallWrites(addr); }
public void WriteMemory(ushort addr, byte value) { MemoryCallbacks.CallWrites(addr); if (addr < 0x0400) { if ((addr & 0xFF) < 0x20) { // return TIA registers or control register if it is still unlocked if ((A7800_control_register & 0x1) == 0 && (addr < 0x20)) { A7800_control_register = value; } else { TIA_regs[addr] = value; } } else if ((addr & 0xFF) < 0x40) { if ((A7800_control_register & 0x2) > 0) { var temp = (addr & 0x3F) - 0x20; // register 8 is read only and controlled by Maria if (temp != 8) { Maria_regs[temp] = value; } if (temp == 4) // WSYNC { cpu.RDY = false; } } } else if (addr < 0x100) { // RAM block 0 RAM[addr - 0x40 + 0x840] = value; } else if (addr < 0x200) { // RAM block 1 RAM[addr - 0x140 + 0x940] = value; } else if (addr < 0x300) { regs_6532[addr - 0x240] = value; } else { // what is mapped here? } } else if (addr < 0x480) { // cartridge space available mapper.WriteMemory(addr, value); } else if (addr < 0x500) { // this is where RAM for the 6532 resides for use in 2600 mode // is it accessible in 7800 mode? } else if (addr < 0x1800) { // cartridge space available mapper.WriteMemory(addr, value); } else if (addr < 0x2800) { RAM[addr - 0x1800] = value; } else if (addr < 0x4000) { // could be either RAM mirror or ROM mapper.WriteMemory(addr, value); } else { // cartridge and other OPSYS mapper.WriteMemory(addr, value); } }