public void Setup()
{
bus = new Kore.MainBus();
cpu = new Kore.CPU(bus);
ram = new Kore.RamController(bus, cpu.MemorySize);
alu = cpu.alu;
}
public void SetGetMemoryMethods()
{
ushort MEMORY_SIZE = 1024;
ushort MEMORY_TEST_SIZE = 32;
bus = new Kore.MainBus();
cpu = new Kore.CPU(bus, MEMORY_SIZE);
ram = new Kore.RamController(bus, cpu.MemorySize);
ram.store(add_addi_bin, 0, (ulong)add_addi_bin.Length, 0);
Random rand = new Random();
for (uint c = 0; c < MEMORY_TEST_SIZE; c++)
{
uint offset = (uint)rand.Next(0, MEMORY_SIZE - MEMORY_TEST_SIZE);
byte[] signature = new byte[MEMORY_TEST_SIZE];
rand.NextBytes(signature);
for (uint i = 0; i < MEMORY_TEST_SIZE; i++)
{
ram.setByte(offset + i, signature[i]);
}
for (uint i = 0; i < MEMORY_TEST_SIZE; i++)
{
Assert.AreEqual(signature[i], ram.getByte(offset + i));
}
}
}
public void StoreMethod()
{
bus = new Kore.MainBus();
cpu = new Kore.CPU(bus, 16);
ram = new Kore.RamController(bus, cpu.MemorySize);
byte offset = 3;
ram.store(add_addi_bin, 0, (ulong)add_addi_bin.Length, offset);
for (uint i = 0; i < 16; i++)
{
if (i < offset)
{
Assert.AreEqual(0x0, ram.getByte(i));
}
else if (i < offset + add_addi_bin.Length)
{
Assert.AreEqual(add_addi_bin[i - offset], ram.getByte(i));
}
else
{
Assert.AreEqual(0x0, ram.getByte(i));
}
}
for (uint i = 0; i < 16; i++)
{
ram.setByte(i, 0xFF);
}
for (uint i = 0; i < 16; i++)
{
Assert.AreEqual(0xFF, ram.getByte(i));
}
ram.store(add_addi_bin, 0, (ulong)add_addi_bin.Length, offset);
for (uint i = 0; i < 16; i++)
{
if (i < offset)
{
Assert.AreEqual(0xFF, ram.getByte(i));
}
else if (i < offset + add_addi_bin.Length)
{
Assert.AreEqual(add_addi_bin[i - offset], ram.getByte(i));
}
else
{
Assert.AreEqual(0xFF, ram.getByte(i));
}
}
}