public static void LinkLEDs(
            byte value,
            FPGA.Signal <bool> SEG_A,
            FPGA.Signal <bool> SEG_B,
            FPGA.Signal <bool> SEG_C,
            FPGA.Signal <bool> SEG_D,
            FPGA.Signal <bool> SEG_E,
            FPGA.Signal <bool> SEG_F,
            FPGA.Signal <bool> SEG_G,
            FPGA.Signal <bool> SEG_P
            )
        {
            Func <bool> bit0 = () => FPGA.Config.Bit(value, 0);
            Func <bool> bit1 = () => FPGA.Config.Bit(value, 1);
            Func <bool> bit2 = () => FPGA.Config.Bit(value, 2);
            Func <bool> bit3 = () => FPGA.Config.Bit(value, 3);
            Func <bool> bit4 = () => FPGA.Config.Bit(value, 4);
            Func <bool> bit5 = () => FPGA.Config.Bit(value, 5);
            Func <bool> bit6 = () => FPGA.Config.Bit(value, 6);
            Func <bool> bit7 = () => FPGA.Config.Bit(value, 7);

            FPGA.Config.Link(bit7, SEG_A);
            FPGA.Config.Link(bit6, SEG_B);
            FPGA.Config.Link(bit5, SEG_C);
            FPGA.Config.Link(bit4, SEG_D);
            FPGA.Config.Link(bit3, SEG_E);
            FPGA.Config.Link(bit2, SEG_F);
            FPGA.Config.Link(bit1, SEG_G);
            FPGA.Config.Link(bit0, SEG_P);
        }
示例#2
0
 public static void JSONDeserializer <T>(
     T data,
     byte inByte,
     FPGA.Signal <bool> deserialized) where T : new()
 {
     throw new Exception("Simulation not implemented yet");
 }
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            DTOs.IsPrimeRequest request      = new DTOs.IsPrimeRequest();
            FPGA.Signal <bool>  deserialized = new FPGA.Signal <bool>();
            Drivers.JSON.DeserializeFromUART <DTOs.IsPrimeRequest>(request, RXD, deserialized);

            Action handler = () =>
            {
                bool result = false;
                uint source = request.value;
                // TODO: member access is not supported in function call
                SequentialMath.Calculators.IsPrime((uint)source, out result);

                DTOs.IsPrimeResponse response = new DTOs.IsPrimeResponse();
                response.value  = request.value;
                response.result = (byte)((result == true) ? 1 : 0);

                Drivers.JSON.SerializeToUART <DTOs.IsPrimeResponse>(response, TXD);
            };

            FPGA.Config.OnSignal(deserialized, handler);
        }
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            Action handler = () =>
            {
                byte data = 0;
                Drivers.UART.Read(RXD, out data);

                Func <byte>        dFunc       = () => (byte)(data * 2);
                FPGA.Signal <bool> writeEnable = false;

                FPGA.Register <byte> result = new FPGA.Register <byte>(0);

                FPGA.Config.RegisterOverride(result, dFunc, writeEnable);

                FPGA.Runtime.Assign(FPGA.Expressions.AssignSignal(true, writeEnable));

                Drivers.UART.Write(result, TXD);
            };
            bool trigger = true;

            FPGA.Config.OnSignal(trigger, handler);
        }
示例#5
0
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            byte data = 0;

            FPGA.Signal <bool> completed = false;

            Action dataHandler = () =>
            {
                Drivers.UART.Write(data, TXD);
                completed = true;
            };

            FPGA.Config.OnRegisterWritten(data, dataHandler);

            Action mainHandler = () =>
            {
                data = 48;
                FPGA.Runtime.WaitForAllConditions(completed);
                data = 49;
                FPGA.Runtime.WaitForAllConditions(completed);
            };

            bool trigger = true;

            FPGA.Config.OnSignal(trigger, mainHandler);
        }
        public static void GameIteration(
            GameControlsState controlsState,
            eCellType[] fieldMatrix,
            Position head,
            Position tail,
            ref eDirectionType currentDirection,
            int randomValue,
            FPGA.Signal <bool> TXD)
        {
            eDirectionType nextDirectionFromKeypad   = eDirectionType.None;
            eDirectionType nextDirectionFromJoystick = eDirectionType.None;
            eDirectionType nextDirection             = eDirectionType.None;

            Lookups.KeyCodeToDirection(
                controlsState.keyCode,
                ref nextDirectionFromKeypad);

            Lookups.JoystickPositionToDirection(
                controlsState.adcChannel1,
                controlsState.adcChannel2,
                ref nextDirectionFromJoystick);

            bool isReverse = false;

            Lookups.IsReverse(currentDirection, nextDirection, ref isReverse);

            // TODO: variable declaration from conditional expression;
            nextDirection = isReverse
                            ? currentDirection
                            : nextDirectionFromKeypad != eDirectionType.None
                                    ? nextDirectionFromKeypad
                                        : nextDirectionFromJoystick != eDirectionType.None
                                            ? nextDirectionFromJoystick
                                            : currentDirection;

            Diagnostics.ReportState(
                controlsState,
                nextDirectionFromKeypad,
                nextDirectionFromJoystick,
                nextDirection,
                TXD);

            bool expanded = false;

            ApplyChange(
                fieldMatrix,
                head,
                tail,
                currentDirection, nextDirection,
                out expanded);

            if (expanded)
            {
                FieldMatrix.PlaceNextPiece(fieldMatrix, randomValue);
            }

            currentDirection = nextDirection;
        }
示例#7
0
 public static void JSONSerializer <T>(
     T data,
     out FPGA.Signal <bool> hasMoreData,
     out FPGA.Signal <bool> triggerDequeue,
     out FPGA.Signal <bool> dataDequeued,
     out FPGA.Signal <byte> currentByte)
 {
     throw new Exception("Simulation not implemented yet");
 }
示例#8
0
        public static void WriteFloat(uint baud, float data, FPGA.Signal <bool> TXD)
        {
            bool internalTXD = true;

            // hardlink from register to output signal, it has to hold its value
            FPGA.Config.Link(internalTXD, TXD);

            UART.RegisteredWriteFloat(baud, data, out internalTXD);
        }
示例#9
0
        static void internalFPUOp()
        {
            float fpuOp1 = 0, fpuOp2 = 0;

            FPGA.Signal <float> fpuResult = 0;
            byte fpuOp = 0;

            FPGA.Signal <bool> fpuTrigger = false, fpuCompleted = false;
            FPGA.Config.Entity <IFPU>().Op(fpuTrigger, fpuCompleted, fpuOp1, fpuOp2, fpuOp, fpuResult);
        }
示例#10
0
        public static void Write(uint baud, byte data, FPGA.Signal <bool> TXD)
        {
            // default TXD is high
            bool internalTXD = true;

            // hardlink from register to output signal, it has to hold its value
            FPGA.Config.Link(internalTXD, TXD);

            UART.RegisteredWrite(baud, data, out internalTXD);
        }
示例#11
0
        static void internalFloatToIntCast()
        {
            FPGA.Signal <bool> floatToIntCastTrigger = false, floatToIntCastCompleted = false;
            float floatToIntCastSource = 0;

            FPGA.Signal <long> floatToIntCastResult = 0;

            FPGA.Config.Entity <IFloatToIntCast>().Op(
                floatToIntCastTrigger,
                floatToIntCastCompleted,
                floatToIntCastSource,
                floatToIntCastResult);
        }
示例#12
0
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD)
        {
            byte data = 0;

            FPGA.Signal <byte> externalInput = new FPGA.Signal <byte>();
            FPGA.Config.Link(data, out externalInput);

            FPGA.Signal <byte> externalOutput  = new FPGA.Signal <byte>();
            FPGA.Signal <bool> externalTrigger = new FPGA.Signal <bool>();
            FPGA.Signal <bool> externalReady   = new FPGA.Signal <bool>();

            Action handler = () =>
            {
                Drivers.UART.Read(RXD, out data);

                for (byte i = 0; i < 3; i++)
                {
                    byte result = 0;

                    switch (i)
                    {
                    case 0:
                        FPGA.Config.Entity <IConcreteExternalPackage1>().ExternalEntity(externalInput, externalOutput, externalTrigger, externalReady);

                        externalTrigger = true;

                        FPGA.Runtime.WaitForAllConditions(externalReady);

                        result = externalOutput;
                        break;

                    case 1:
                        Controllers.External_ExistingEntity.NestedLevel1 <IConcreteExternalPackage1>(data, out result);
                        break;

                    case 2:
                        Controllers.External_ExistingEntity.NestedLevel2 <IConcreteExternalPackage2>(40, out result);
                        break;
                    }

                    Drivers.UART.Write(result, TXD);
                }
            };

            const bool trigger = true;

            FPGA.Config.OnSignal(trigger, handler);
        }
示例#13
0
        // Here are examples of two implementations of some functinality

        /*
         * -- IConcreteExternalPackage1_ExternalEntity.vhdl
         * -- first implementation
         * library ieee;
         * use ieee.std_logic_1164.all;
         * use ieee.numeric_std.all;
         *
         * entity IConcreteExternalPackage1_ExternalEntity is
         *  port(
         *      Clock: in std_logic;
         *      Reset: in std_logic;
         *      InSignal: in unsigned(8 downto 1);
         *      OutSignal: out unsigned(8 downto 1);
         *      InTrigger: in std_logic;
         *      OutReady: out std_logic
         *  );
         * end entity IConcreteExternalPackage1_ExternalEntity;
         *
         * architecture rtl of IConcreteExternalPackage1_ExternalEntity is
         *
         * begin
         *  -- forward incoming data to output, always ready
         *  OutSignal <= InSignal + 1;
         *  OutReady <= '1';
         * end architecture rtl;
         *
         *
         *
         *
         * /////////////////////////////////////////////////////////
         * -- IConcreteExternalPackage2_ExternalEntity.vhdl
         * -- second implementation
         * library ieee;
         * use ieee.std_logic_1164.all;
         * use ieee.numeric_std.all;
         *
         * entity IConcreteExternalPackage2_ExternalEntity is
         *      port(
         *              Clock: in std_logic;
         *              Reset: in std_logic;
         *              InSignal: in unsigned(8 downto 1);
         *              OutSignal: out unsigned(8 downto 1);
         *              InTrigger: in std_logic;
         *              OutReady: out std_logic
         *      );
         * end entity IConcreteExternalPackage2_ExternalEntity;
         *
         * architecture rtl of IConcreteExternalPackage2_ExternalEntity is
         *      signal counter: unsigned(8 downto 1) := (others => '0');
         *      type FSM is (Ready,Counting);
         *      signal currentState: FSM := Ready;
         * begin
         *
         *      process(Clock,Reset,InSignal,InTrigger) is
         *      begin
         *              if( rising_edge(Clock) ) then
         *                      if Reset = '1' then
         *                              currentState <= Ready;
         *                              counter <= (others => '0');
         *                      else
         *                              case currentState is
         *                                      when Ready =>
         *                                              if( InTrigger = '1') then
         *                                                      counter <= (others => '0');
         *                                                      currentState <= Counting;
         *                                              end if;
         *                                      when Counting =>
         *                                              if counter = 10 then
         *                                                      currentState <= Ready;
         *                                              else
         *                                                      counter <= counter + 1;
         *                                              end if;
         *                                      when others =>
         *                                              currentState <= Ready;
         *                              end case;
         *                      end if;
         *              end if;
         *      end process;
         *
         *      OutSignal <= InSignal + counter;
         *      OutReady <= '1' when currentState = Ready else '0';
         *
         * end architecture rtl;
         */

        static void NestedLevel1 <T>(byte dataIn, out byte dataOut) where T : IAbstractExternalPackage
        {
            FPGA.Signal <byte> externalInput = new FPGA.Signal <byte>();
            FPGA.Config.Link(dataIn, out externalInput);

            FPGA.Signal <byte> externalOutput  = new FPGA.Signal <byte>();
            FPGA.Signal <bool> externalTrigger = new FPGA.Signal <bool>();
            FPGA.Signal <bool> externalReady   = new FPGA.Signal <bool>();

            FPGA.Config.Entity <T>().ExternalEntity(externalInput, externalOutput, externalTrigger, externalReady);
            externalTrigger = true;

            FPGA.Runtime.WaitForAllConditions(externalReady);

            dataOut = externalOutput;
        }
示例#14
0
        static void internalIntToFloatCast()
        {
            bool intToFloatIsSigned = false;

            FPGA.Signal <bool> intToFloatCastTrigger = false, intToFloatCastCompleted = false;
            ulong intToFloatCastSource = 0;

            FPGA.Signal <float> intToFloatCastResult = 0;

            FPGA.Config.Entity <IIntToFloatCast>().Op(
                intToFloatCastTrigger,
                intToFloatIsSigned,
                intToFloatCastCompleted,
                intToFloatCastSource,
                intToFloatCastResult);
        }
示例#15
0
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            DTOs.RoundTrip     request      = new DTOs.RoundTrip();
            FPGA.Signal <bool> deserialized = new FPGA.Signal <bool>();
            Drivers.JSON.DeserializeFromUART <DTOs.RoundTrip>(request, RXD, deserialized);

            Action processingHandler = () =>
            {
                Drivers.JSON.SerializeToUART <DTOs.RoundTrip>(request, TXD);
            };

            FPGA.Config.OnSignal(deserialized, processingHandler);
        }
        public static void ReportState(
            GameControlsState controlsState,
            eDirectionType nextDirectionFromKeypad,
            eDirectionType nextDirectionFromJoystick,
            eDirectionType nextDirection,
            FPGA.Signal <bool> TXD
            )
        {
            SnakeDBG dbg = new SnakeDBG();

            dbg.C1 = controlsState.adcChannel1;
            dbg.C2 = controlsState.adcChannel2;

            dbg.KD = nextDirectionFromKeypad;
            dbg.JD = nextDirectionFromJoystick;
            dbg.ND = nextDirection;

            JSON.SerializeToUART(ref dbg, TXD);
        }
示例#17
0
        public static void DeserializeFromUART <T>(
            T obj,
            FPGA.InputSignal <bool> RXD,
            FPGA.Signal <bool> deserialized) where T : new()
        {
            byte data = 0;

            FPGA.Config.JSONDeserializer(obj, data, deserialized);

            bool   trigger     = true;
            Action uartHandler = () =>
            {
                while (true)
                {
                    Drivers.UART.Read(RXD, out data);
                }
            };

            FPGA.Config.OnSignal(trigger, uartHandler);
        }
示例#18
0
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            Controllers.eShiftCommand cmd = 0;

            Action readHandler = () =>
            {
                byte data = 0;
                Drivers.UART.Read(RXD, out data);
                cmd = (Controllers.eShiftCommand)data;
            };
            bool trigger = true;

            FPGA.Config.OnSignal(trigger, readHandler);

            byte write = 0;

            FPGA.Signal <bool> dataWritten = false;

            Action writeHandler = () =>
            {
                Drivers.UART.Write(write, TXD);
                dataWritten = true;
            };

            FPGA.Config.OnRegisterWritten(write, writeHandler);

            Action cmdHandler = () =>
            {
                byte result = 0;
                Controllers.Math_Shifter.ValueForCommand(cmd, out result);

                write = result;
                FPGA.Runtime.WaitForAllConditions(dataWritten);
            };

            FPGA.Config.OnRegisterWritten(cmd, cmdHandler);
        }
示例#19
0
        public static async Task Aggregator(
            FPGA.OutputSignal <bool> LED1,
            FPGA.OutputSignal <bool> LED2,
            FPGA.OutputSignal <bool> LED3,
            FPGA.OutputSignal <bool> LED4,
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            bool internalLED1 = false, internalLED2 = false, internalLED3 = false, internalLED4 = false;

            FPGA.Config.Link(internalLED1, LED1);
            FPGA.Config.Link(internalLED2, LED2);
            FPGA.Config.Link(internalLED3, LED3);
            FPGA.Config.Link(internalLED4, LED4);

            Action statusHandler = () =>
            {
                Controllers.LEDDto data = new Controllers.LEDDto(); // TODO: support var
                data.LED = (byte)(((internalLED4 ? 1 : 0) << 3) | ((internalLED3 ? 1 : 0) << 2) | ((internalLED2 ? 1 : 0) << 1) | (internalLED1 ? 1 : 0));

                Drivers.JSON.SerializeToUART <Controllers.LEDDto>(data, TXD); // TODO: autodetect generic type
            };

            FPGA.Config.OnTimer(TimeSpan.FromSeconds(1), statusHandler);

            FPGA.Signal <bool> commandDeserialized = new FPGA.Signal <bool>();
            Controllers.LEDDto command             = new Controllers.LEDDto();                        // TODO: autodetect type
            Drivers.JSON.DeserializeFromUART <Controllers.LEDDto>(command, RXD, commandDeserialized); // TODO: autodetect generic type

            Action receiverHandler = () =>
            {
                internalLED1 = (command.LED & 1) > 0; //FPGA.Config.Bit(command.LED, 0); // TODO: support struct access
                internalLED2 = (command.LED & 2) > 0;
                internalLED3 = (command.LED & 4) > 0;
                internalLED4 = (command.LED & 8) > 0;
            };

            FPGA.Config.OnSignal(commandDeserialized, receiverHandler);
        }
示例#20
0
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD
            )
        {
            DTOs.DividerRequest request      = new DTOs.DividerRequest();
            FPGA.Signal <bool>  deserialized = new FPGA.Signal <bool>();

            Drivers.JSON.DeserializeFromUART <DTOs.DividerRequest>(request, RXD, deserialized);

            Action processingHandler = () =>
            {
                ulong result, remainder;
                SequentialMath.Divider.Unsigned <ulong>(request.Numerator, request.Denominator, out result, out remainder);
                DTOs.DividerResponse response = new DTOs.DividerResponse();
                response.Result    = result;
                response.Remainder = remainder;
                Drivers.JSON.SerializeToUART <DTOs.DividerResponse>(response, TXD);
            };

            FPGA.Config.OnSignal(deserialized, processingHandler);
        }
示例#21
0
        public static void IsPrime(uint value, out bool result)
        {
            // run some prechecks to skip known cases
            if (value < 2)
            {
                result = false;
                return;
            }

            if (value == 2)
            {
                result = true;
                return;
            }

            // check if value is even and skip it
            if ((value & 1) == 0)
            {
                result = false;
                return;
            }

            // remaining values here are 3,5,7
            if (value <= 7)
            {
                result = true;
                return;
            }

            // start checking from 3
            uint   currentValue     = 3;
            object currentValueLock = new object();

            ushort completedWorkers     = 0;
            object completedWorkersLock = new object();

            Func <bool> completed = () => completedWorkers == 2;

            FPGA.Signal <bool> trigger = new FPGA.Signal <bool>();


            // run bruteforce check
            bool foundDivider = false;

            FPGA.Config.Suppress("W0003", foundDivider);

            Action worker = () =>
            {
                while (!foundDivider)
                {
                    uint workerValue = 0;
                    lock (currentValueLock)
                    {
                        workerValue   = currentValue;
                        currentValue += 2;
                    }

                    Func <ulong> squared = () => workerValue * workerValue;

                    if (squared() == value)
                    {
                        foundDivider = true;
                        break;
                    }

                    if (squared() > value)
                    {
                        break;
                    }

                    uint divResult = 0, divRemainder = 0;
                    SequentialMath.Divider.Unsigned <uint>(value, workerValue, out divResult, out divRemainder);

                    if (divRemainder == 0)
                    {
                        foundDivider = true;
                        break;
                    }
                }

                lock (completedWorkersLock)
                {
                    completedWorkers++;
                }
            };

            FPGA.Config.OnSignal(trigger, worker, 2);

            trigger = true;
            FPGA.Runtime.WaitForAllConditions(completed);

            result = !foundDivider;
        }
示例#22
0
        public static async Task Aggregator(
            FPGA.InputSignal <bool> RXD,
            FPGA.OutputSignal <bool> TXD,
            FPGA.InputSignal <bool> Echo,
            FPGA.OutputSignal <bool> Trigger)
        {
            const uint detectionDistance = 10;
            const uint buffSize          = 6;
            ushort     last       = 0;
            bool       monitoring = false;
            byte       addr       = 0;

            ushort[] buff       = new ushort[buffSize];
            bool     buffFilled = false;

            byte dataToTransmit = 0;

            FPGA.Signal <bool> transmitted = false;

            Action transmitterHandler = () =>
            {
                Drivers.UART.Write(dataToTransmit, TXD);
                transmitted = true;
            };

            Action measureHandler = () =>
            {
                /*
                 * ulong num = 1000000000000000, den = 99999999999999, res, rem;
                 * SequentialMath.Divider.Unsigned<ulong>(num, den, out res, out rem);
                 * dataToTransmit = (byte)res;
                 * FPGA.Runtime.WaitForAllConditions(transmitted);
                 * dataToTransmit = (byte)rem;
                 * FPGA.Runtime.WaitForAllConditions(transmitted);
                 */
                ushort distance = 0;
                Drivers.HCSR04.Measure(Echo, Trigger, out distance);

                byte db1 = (byte)distance;
                byte db2 = (byte)(distance >> 8);

                dataToTransmit = db1;
                FPGA.Runtime.WaitForAllConditions(transmitted);

                dataToTransmit = db2;
                FPGA.Runtime.WaitForAllConditions(transmitted);

                buff[addr] = distance;
                addr++;

                if (addr >= buffSize)
                {
                    addr       = 0;
                    buffFilled = true;
                }

                if (buffFilled)
                {
                    ushort mean = 0;
                    Controllers.DistanceMonitor.MeanValue(buff, out mean);

                    byte b1 = (byte)mean;
                    byte b2 = (byte)(mean >> 8);

                    dataToTransmit = b1;
                    FPGA.Runtime.WaitForAllConditions(transmitted);
                    dataToTransmit = b2;
                    FPGA.Runtime.WaitForAllConditions(transmitted);


                    if (mean > last + detectionDistance)
                    {
                        if (monitoring)
                        {
                            dataToTransmit = 1;
                            FPGA.Runtime.WaitForAllConditions(transmitted);

                            monitoring = false;
                        }

                        last = mean;
                    }

                    if (mean < last)
                    {
                        last       = mean;
                        monitoring = true;
                    }
                }

                dataToTransmit = 255;
                FPGA.Runtime.WaitForAllConditions(transmitted);
            };

            FPGA.Config.OnTimer(TimeSpan.FromMilliseconds(300), measureHandler);
            //FPGA.Config.OnTimer(300000000, measureHandler);
            FPGA.Config.OnRegisterWritten(dataToTransmit, transmitterHandler);
        }
示例#23
0
 public static void Link <T>(FPGA.Signal <T> source, FPGA.OutputSignal <T> target)
 {
 }
示例#24
0
 public static void Link <T>(Func <T> source, FPGA.Signal <T> target)
 {
 }