// Allocate a single hardware page internal unsafe static PhysicalAddress AllocPage() { bool iflag = Lock(); try { CheckConsistency(); if (freeList != PageBlock.Sentinel) { uint blockIdx = freeList; DebugStub.Assert(GetBlock(blockIdx)->IsLinked(freeList)); uint freePage = GetBlock(blockIdx)->FirstFreePage(); MarkPageInBlockUsed(blockIdx, freePage); ulong physPage = ((ulong)blockIdx * (ulong)PageBlock.PagesPerBlock) + freePage; ulong physAddr = (ulong)MemoryManager.PageSize * physPage; return new PhysicalAddress(physAddr); } DebugStub.WriteLine("** Physical memory exhausted! **"); return PhysicalAddress.Null; } finally { CheckConsistency(); Unlock(iflag); } }
public override void SetNextInterrupt(TimeSpan delta) { #if VERBOSE DebugStub.WriteLine("Timer.SetNextInterrupt({0})", __arglist(delta.Ticks)); #endif DebugStub.Assert(Processor.InterruptsDisabled()); DebugStub.Assert(delta >= minInterruptInterval); DebugStub.Assert(delta <= maxInterruptInterval); bool iflag = Processor.DisableInterrupts(); try { // NB: cast is safe as (delta <= MaxInterruptInterval) uint timerIntervals = (uint)((delta.Ticks * Omap3430_TIMER1_Freq) / (1000 * 1000 * 10)); uint count = (0xffffffff - timerIntervals) + 1; Write(tldr, count); SetPeriodic(); SetInterruptEnabled(true); Start(); interruptPending = true; } finally { Processor.RestoreInterrupts(iflag); } }
public static void WriteInterfaceLine([Claims] InterfaceInfo ifInfo, string !ifName) { bool found = false; delete ifInfo.driverName; delete ifInfo.driverVersion; InterfaceIPInfo[] in ExHeap ipConfigs = ifInfo.ipConfigs; if (ipConfigs != null) { for (int i = 0; i < ipConfigs.Length; i++) { InterfaceIPInfo ipc = ipConfigs[i]; IPv4 ipv4 = new IPv4(ipc.address); Console.WriteLine("TESTUTIL:IPAddress: {0,-14}", ipv4); DebugStub.WriteLine("TESTUTIL:IPAddress:{0}:", __arglist(ipv4.ToString())); found |= true; } delete ipConfigs; } if (found == false) { DebugStub.WriteLine("TESTUTIL:IPAddress: Not available."); } }
/// Called from Binder which lives in a separate dll. public static SystemType Register(string name, long lowerHash, long upperHash, SystemType parent) { RuntimeSystemType parentrts = HandleTable.GetHandle(parent.id) as RuntimeSystemType; #if false DebugStub.WriteLine("SystemType.Register '{0}' hash0={1:x8} hash1={2:x8} Parent {3}", __arglist(name, lowerHash, upperHash, parent.TypeId)); Tracing.Log(Tracing.Debug, "Type '{0}' (parent={1:x8})", name, parent.id); Tracing.Log(Tracing.Debug, "hash0={0:x8} hash1={1:x8}", lowerHash.ToString(), upperHash.ToString()); #endif // false UIntPtr childHandle = parentrts.LookupChildHandle(name, lowerHash, upperHash); #if false Tracing.Log(Tracing.Debug, "result UIntPtr = {0:x8}", childHandle); #endif // false SystemType ret = new SystemType(childHandle); return(ret); }
public bool IsChecksumValid() { ushort sum = (ushort)((((int)verLen) << 8) + ((int)tos)); sum = SumShortValues(sum, totalLength); sum = SumShortValues(sum, id); sum = SumShortValues(sum, offset); sum = SumShortValues(sum, (ushort)((((int)ttl) << 8) + ((int)protocol))); sum = SumShortValues(sum, (ushort)(((uint)srcAddress) >> 16)); sum = SumShortValues(sum, (ushort)(((uint)srcAddress) & 0xFFFFU)); sum = SumShortValues(sum, (ushort)(((uint)destAddress) >> 16)); sum = SumShortValues(sum, (ushort)(((uint)destAddress) & 0xFFFFU)); //fix for 0 checksum unchecked { sum = (ushort)~sum; } if (sum == 0) { sum = (ushort)0xFFFF; } if (sum != checksum) { DebugStub.WriteLine("Bad IP Checksum {0:x4} != {1:x4}", DebugStub.ArgList(checksum, sum)); } return(sum == checksum); }
internal void PrintRegisters() { byte TpmAccess = tpmIoMemory.Read8(locality + TpmRegisterOffsets.TpmRegAccess); byte TpmStatus = tpmIoMemory.Read8(locality + TpmRegisterOffsets.TpmStatus); DebugStub.WriteLine("Tpm: PrintRegisters() Access={0:x2}, Status={1:x2}", __arglist(TpmAccess, TpmStatus)); }
public Bytes ExtractHead(out uint startOffset, out uint length) { if (this.Empty) { startOffset = 0; length = 0; return(null); } TcpVectorNode candidate = this.listHead.next; Bytes data = candidate.Unlink(); count--; if (data != null) { size -= candidate.length; } else { DebugStub.WriteLine("Extracthead no data??\n"); DebugStub.Break(); VTable.Assert(false); } startOffset = candidate.startOffset; length = candidate.length; return(data); }
// template for static creation method new public static EachSourceClass Create(string sourcename, uint size, uint storageOptions, uint sourceFlags) { EventingStorage storage = EventingStorage.CreateLocalStorage(storageOptions, size); if (storage == null) { DebugStub.WriteLine("Failure to create local storage " + sourcename); DebugStub.Break(); return(null); } EachSourceClass Source = new EachSourceClass_Impl(sourcename, storage, sourceFlags); if (Source != null) { if (!Source.Register()) { DebugStub.WriteLine("Error initializing the source " + sourcename); return(null); } } return(Source); }
static void Dbg(string line) { if (_dbg_to_kdprint) { DebugStub.WriteLine("KdFiles.cs: " + line); } }
internal static void FixupBlocks(IoMemory relocationMemory, int relocOffset, IoMemory codeMemory, UIntPtr diff) { uint va = relocationMemory.Read32Unchecked(relocOffset); uint size = relocationMemory.Read32Unchecked(relocOffset + 4); while (0 != va) { #if verbose DebugStub.WriteLine(" FixUpBlocks: addr={0:x8}, size={1:x8}, roffset={2:x8} ", __arglist(va, size, relocOffset)); #endif #if SINGULARITY_ASMP if (va == 0xffffffff || size == 0xffffffff || va >= 0xc0000000 || size >= 0xc0000000) { break; } #endif FixupBlock(relocationMemory, relocOffset, codeMemory, diff, va, (int)size); relocOffset += (int)size; va = relocationMemory.Read32Unchecked(relocOffset); size = relocationMemory.Read32Unchecked(relocOffset + 4); } }
public static void Assert(bool assertion) { if (!assertion) { DebugStub.WriteLine("assertion failure, stack trace:"); #if !SINGULARITY StackTrace st = new StackTrace(true); string stackIndent = ""; for (int i = 0; i < st.FrameCount; i++) { // Low down the call stack there are four // stack frames, one for each method invocation. StackFrame sf = st.GetFrame(i); Console.WriteLine("\n" + stackIndent + " Method: {0}", sf.GetMethod()); Console.WriteLine(stackIndent + " File: {0}", sf.GetFileName()); Console.WriteLine(stackIndent + " Line Number: {0}", sf.GetFileLineNumber()); stackIndent += " "; } #endif DebugStub.Break(); throw new Exception("Assertion failed"); } }
private void Unmask(byte irq) { DebugStub.Assert(Processor.InterruptsDisabled()); uint n = irq / 32u; uint bit = 1u << (irq % 32); #if DEBUG_DISPATCH_IO DebugStub.WriteLine("PIC.Unmask({0}) => {1:x8}", __arglist(irq, bit)); #endif uint mask = GetMaskWord(n); if ((mask & bit) != 0) { #if DEBUG_DISPATCH_IO DebugStub.WriteLine("-- Unmask IRQs [{0}: old={1:x8} new={2:x8}", __arglist(n, mask, mask & ~bit)); #endif #if false // Enable this to set interrupt without hardware. IoResult result = IoResult.Success; intcps_mir_clear[n].Write32NoThrow(bit, ref result); intcps_isr_set[n].Write32NoThrow(bit, ref result); DebugStub.Assert(IoResult.Success == result); #endif SetMaskWord(n, mask & ~bit); #if PIC_DEBUG DumpBits("-- PIC interrupt mask: {2:x8}{1:x8}{0:x8}", intcps_mir); #endif } }
public override void EnableIrq(byte irq) { if (irq >= INTCPS_Vectors) { DebugStub.Break(); // throw new OverflowException // (String.Format("irq {0} out of range.", irq)); } #if DEBUG_INTERRUPTS DebugStub.WriteLine("Int{0:x2} Enable, Mask={3:x8}{2:x8}{1:x8}", __arglist(irq, irqMask0, irqMask1, irqMask2)); #endif bool saved = Processor.DisableInterrupts(); try { Unmask(irq); #if PIC_DEBUG DumpRegisters(); #endif } finally { Processor.RestoreInterrupts(saved); } }
public override void AckIrq(byte irq) { DebugStub.Assert(Processor.InterruptsDisabled()); #if PIC_DEBUG DumpRegisters(); #endif // Mark the IRQ as activated and mask it #if DEBUG_INTERRUPTS DebugStub.WriteLine("Int{0:x2} Acked, Mask={3:x8}{2:x8}{1:x8}", __arglist(irq, irqMask0, irqMask1, irqMask2)); #endif // Quiet the interrupt controller. IoResult result = IoResult.Success; uint n = irq / 32u; uint bit = 1u << (irq % 32); if (n < intcps_isr_clear.Length) { intcps_isr_clear[n].Write32NoThrow(bit, ref result); } DebugStub.Assert(IoResult.Success == result); #if PIC_DEBUG DumpRegisters(); #endif }
internal static void SwitchToHpetClock(Hpet hpet) { DebugStub.WriteLine("Switching to HPET clock"); halClock.SwitchToHpetClock( new HpetClock(hpet, (ulong)halClock.GetKernelTicks() + 1000u) ); }
public void Disarm() { //According to the "Programming Interface for Bus Master IDE Controller" // 1) reset the Start/Stop bit in command register // 2) read controller status // 3) read drive status // to determine if the xfer completed successfully. commandPort.Write8(BUSMASTER_CONTROL_MASK_STOP); // disable BM //Tracing.Log(Tracing.Debug," stop: fullstatus ={0:x}\n",(UIntPtr)ideConfigHandle.IdeController.ReadFullStatus()); byte status = GetStatus(); if ((status & (byte)BUSMASTER_STATUS_MASK_INTERRUPT) == 0) { Tracing.Log(Tracing.Debug, "BusMaster.Disarm: interrupt line not set {0}!\n", (UIntPtr)status); DebugStub.WriteLine("BusMaster.Disarm: interrupt line not set {0}!\n", __arglist(status)); //DebugStub.Break(); } if ((status & (byte)BUSMASTER_STATUS_MASK_ERROR) > 0) { Tracing.Log(Tracing.Debug, "BusMaster.Disarm: error!!!!\n", (UIntPtr)status); DebugStub.WriteLine("BusMaster.Disarm: error!!!!\n", __arglist(status)); //DebugStub.Break(); } status = (byte)(BUSMASTER_STATUS_MASK_INTERRUPT | BUSMASTER_STATUS_MASK_ERROR); statusPort.Write8(status); // clear interrupt BM //Tracing.Log(Tracing.Debug,"cntlr status ={0:x}\n",(UIntPtr)ideConfigHandle.IdeController.ReadFullStatus()); //Tracing.Log(Tracing.Debug,"bm status : {0:x}",(UIntPtr) statusPort.Read8()); } // BmDisarm
internal override void ReceiveEvent(DhcpFormat dhcp) { //DebugStub.WriteLine("FSM DHCP packet SELECTING.\n"); // Check if message is in response to our request if (dhcp.BootMessageType != DhcpFormat.BootType.Reply || dhcp.TransactionID != client.TransactionID || dhcp.GetHardwareAddress() != client.MacAddress) { DebugStub.WriteLine("FSM DHCP bad id.\n"); return; } IPv4 serverAddress = dhcp.NextServerIPAddress; // Check if offered address is valid (ie not zero // and below class E) IPv4 offeredAddress = dhcp.YourIPAddress; if (offeredAddress == IPv4.Any || offeredAddress.IsMulticast()) { DebugStub.WriteLine("FSM DHCP multicast addr.\n"); return; } // Check if message is an offer SortedList offeredOptions = dhcp.GetOptions(); DhcpByteOption messageType = offeredOptions[DhcpMessageType.OptionCode] as DhcpByteOption; if (messageType == null || messageType.Value != (byte)DhcpFormat.MessageType.Offer) { DebugStub.WriteLine("FSM DHCP not an offer.\n"); return; } // Must have parameters byte [] parameters = new byte [] { DhcpSubnetMask.OptionCode, DhcpRouter.OptionCode, // DhcpDomainNameServer.OptionCode }; foreach (byte p in parameters) { IDhcpOption ido = offeredOptions[p] as IDhcpOption; if (ido == null) { DebugStub.WriteLine("FSM DHCP missing option 0x{0:x2}.\n", DebugStub.ArgList(p)); return; } } client.CancelStateTimeout(); client.ChangeState(new DhcpClientStateRequesting(client, serverAddress, offeredAddress, offeredOptions)); }
public static void DeferedUpdateNotification() { uint CapturedValue = DeferedCommand; DeferedCommand = 0; // TODO: This needs to be be moved later in a work item thread pool mechanism // of some sort if ((CapturedValue & DEFERED_COMMAND_ENABLE_KERNEL_GC) != 0) { // TODO: This API has disappeared in the arm branch // - may need to get moved to a new API // GCProfilerLogger.StartProfiling(); } if ((CapturedValue & DEFERED_COMMAND_FORCE_GC_COLLECTION) != 0) { DebugStub.WriteLine("Kernel GC collection started\n"); System.GC.Collect(); System.GC.WaitForPendingFinalizers(); System.GC.Collect(); DebugStub.WriteLine("Kernel GC collection completed\n"); DebugStub.Break(); } }
public Bytes PopAllPackets() { Bytes packet; int sizeOfData; Bytes buffer; if (byteCount <= 0) { DebugStub.WriteLine("UDP PopAllPackets: no data???\n"); DebugStub.Break(); return(null); } using (thisLock.Lock()) { DebugPrint("Popping {0} bytes of data to client\n", byteCount); buffer = new Bytes(new byte[byteCount]); VectorQueueByte incomingPacketQueue = packetContainer.Acquire(); int offset = 0; while ((packet = incomingPacketQueue.ExtractHead()) != null) { VTable.Assert(packet != null); Bitter.Copy(buffer, offset, packet.Length, packet, 0); offset += packet.Length; byteCount -= packet.Length; //delete packet; } packetContainer.Release(incomingPacketQueue); DebugStub.Assert(byteCount == 0); } return(buffer); }
private void Unmask(byte irq) { DebugStub.Assert(Processor.InterruptsDisabled()); ushort newMask = (ushort)(irqMask & ~(1 << irq)); if (newMask != irqMask) { #if DEBUG_DISPATCH_IO DebugStub.WriteLine("-- Unmask IRQs: old={0:x4} new={1:x4}", __arglist(irqMask, newMask)); #endif irqMask = newMask; IoResult result; result = pic1MaskPort.Write8NoThrow((byte)(irqMask >> 8)); DebugStub.Assert(IoResult.Success == result); result = pic0MaskPort.Write8NoThrow((byte)(irqMask & 0xff)); DebugStub.Assert(IoResult.Success == result); #if PIC_DEBUG byte mask0; result = pic0MaskPort.Read8(out mask0); DebugStub.Assert(IoResult.Success == result); byte mask1; result = pic1MaskPort.Read8(out mask1); DebugStub.Assert(IoResult.Success == result); DebugStub.Print("PIC Mask: {0:x2}{1:x2}\n", __arglist(mask1, mask0)); #endif } }
public static unsafe void DispatchInterrupt(InterruptContext *context) { #if false DebugStub.WriteLine("---------------------------------------------------------------\n"); DebugStub.WriteLine("DispatchInterrupt (vector={0:x2})", __arglist(context->vector)); context->Display(); DebugStub.WriteLine("---------------------------------------------------------------\n"); #endif // This count is stored in the Singularity Processor object, since that is where singx86 // looks for it. Need to move at some point. Singularity.Processor p = Singularity.Processor.CurrentProcessor; if (p != null) { p.IncrementInterruptCounts(context->ExceptionId); } if (context->IsException()) { // All exceptions get reported to the debugger (as first chance.) DispatchDebugger(ref GetCurrentCpu()->spill, context->ExceptionId); // TBD: eventually we want to actually have OS logic to do something with // hardware exceptions... } else { // Reset context for interrupt code (this affects the fpu) // @todo: investigate details here; this seems wrong -SET SpillContext.ResetCurrent(); HalPlatform.CurrentCpu.DispatchInterrupt(context); } }
private void UpdatePendingRequests(IPv4 ipAddress, EthernetAddress macAddress) { using (pendingRequestsLock.Lock()) { //Sigh...we're missing a linked list in the current Singularity C# runtime foreach (PendingArpRequest pendingRequest in pendingRequests) { VTable.Assert(pendingRequest != null); if (pendingRequest.address == ipAddress) { pendingRequest.active = false; DebugStub.WriteLine("found waiting arp request...sending on out"); VectorQueueByte txBuffer = pendingRequest.txContainer.Acquire(); Bytes header = txBuffer.ExtractHead(); Bytes buffer = txBuffer.ExtractHead(); VTable.Assert(header != null); VTable.Assert(buffer != null); pendingRequest.txContainer.Release(txBuffer); //Format ethernet header EthernetHeader.Write(header, pendingRequest.localMac, macAddress, EthernetHeader.PROTOCOL_IP); //send it! VTable.Assert(pendingRequest.adapter != null); pendingRequest.adapter.PopulateTxRing(header, buffer); continue; } } } }
public unsafe void Display() { #if ISA_IX86 DebugStub.WriteLine(" eax={0:x8} ecx={1:x8} edx={2:x8}", __arglist(ax, cx, dx)); DebugStub.WriteLine(" esp[x-ring only]={0:x8}", __arglist(sp)); DebugStub.WriteLine(" eip={0:x8} efl={1:x8}", __arglist(ip, fl)); #elif ISA_IX64 DebugStub.WriteLine(" rax={0:x16} rcx={1:x16} rdx={2:x16}", __arglist(ax, cx, dx)); DebugStub.WriteLine(" rsp={0:x16}", __arglist(sp)); DebugStub.WriteLine(" rip={0:x16} rfl={1:x16}", __arglist(ip, fl)); #elif ISA_ARM DebugStub.WriteLine("pc={0:x8} sp={1:x8} lr={2:x8} sr={3:x8}", __arglist(pc, sp, lr, cpsr)); DebugStub.WriteLine("r0={0:x8} r1={1:x8} r2={2:x8} r3={3:x8}", __arglist(r0, r1, r2, r3)); #endif }
public byte[] ReadBytes(AcpiObject.RegionSpace regionSpace, ulong offset, ulong length) { byte[] result = new byte[length]; switch (regionSpace) { case AcpiObject.RegionSpace.SystemMemory: IoMemory region = IoMemory.MapPhysicalMemory(offset, length, true /*readable*/, false /*writable*/); for (ulong i = 0; i < length; i++) { result[i] = region.Read8((int)i); } break; default: throw new Exception("ReadBytes() only supported for SystemMemory regions"); } #if DUMP_RAW_READ_WRITES DebugStub.Write("ACPI read: space: " + regionSpace + ", offset: " + offset + ", bytes: " + length + ", result: {"); for (int i = 0; i < result.Length; i++) { DebugStub.Write(result[i].ToString("X")); if (i < result.Length - 1) { DebugStub.Write(","); } } DebugStub.WriteLine("}"); #endif return(result); }
public void Write32(AcpiObject.RegionSpace regionSpace, ulong offset, uint value) { #if DUMP_RAW_READ_WRITES DebugStub.WriteLine("ACPI write: space: " + regionSpace + ", offset: " + offset + ", bytes: " + 4 + ", value: " + value.ToString("X")); #endif switch (regionSpace) { case AcpiObject.RegionSpace.SystemMemory: IoMemory region = IoMemory.MapPhysicalMemory(offset, 4, true /*readable*/, true /*writable*/); region.Write32(0, value); break; case AcpiObject.RegionSpace.SystemIO: IoPort port = new IoPort((ushort)offset, 4, Access.ReadWrite); port.Write32(value); break; case AcpiObject.RegionSpace.PCI_Config: pciConfigAddressPort.Write32(PciConfigEnableMask | (uint)offset); pciConfigDataPort.Write32(value); break; default: throw new Exception("Unimplemented operation region type" + regionSpace); } }
public uint Read32(AcpiObject.RegionSpace regionSpace, ulong offset) { uint result; switch (regionSpace) { case AcpiObject.RegionSpace.SystemMemory: IoMemory region = IoMemory.MapPhysicalMemory(offset, 4, true /*readable*/, false /*writable*/); result = region.Read32(0); break; case AcpiObject.RegionSpace.SystemIO: IoPort port = new IoPort((ushort)offset, 4, Access.Read); result = port.Read32(); break; case AcpiObject.RegionSpace.PCI_Config: pciConfigAddressPort.Write32(PciConfigEnableMask | (uint)offset); result = pciConfigDataPort.Read32(); break; default: throw new Exception("Unimplemented operation region type" + regionSpace); } #if DUMP_RAW_READ_WRITES DebugStub.WriteLine("ACPI read: space: " + regionSpace + ", offset: " + offset + ", bytes: " + 4 + ", result: " + result.ToString("X")); #endif return(result); }
public ushort Read16(AcpiObject.RegionSpace regionSpace, ulong offset) { ushort result; switch (regionSpace) { case AcpiObject.RegionSpace.SystemMemory: // TODO: This is a first stab - ideally the AcpiObject.OperationRegion // ought to be holding onto an IoMemoryRange and passing it in. IoMemory region = IoMemory.MapPhysicalMemory(offset, 2, true /*readable*/, false /*writable*/); result = region.Read16(0); break; case AcpiObject.RegionSpace.SystemIO: IoPort port = new IoPort((ushort)offset, 2, Access.Read); result = port.Read16(); break; case AcpiObject.RegionSpace.PCI_Config: pciConfigAddressPort.Write32(PciConfigEnableMask | (uint)offset); result = pciConfigDataPort.Read16(); break; default: throw new Exception("Unimplemented operation region type" + regionSpace); } #if DUMP_RAW_READ_WRITES DebugStub.WriteLine("ACPI read: space: " + regionSpace + ", offset: " + offset + ", bytes: " + 2 + ", result: " + result.ToString("X")); #endif return(result); }
private static void WriteLine(string s) { Console.WriteLine(s); if (debugMode) { DebugStub.WriteLine(s); } }
public static void WriteLine(string text) { if (text == null) { text = ""; } DebugStub.WriteLine(text); }
public override void Write(AcpiObject.AcpiObject value) { #if SINGULARITY_KERNEL DebugStub.WriteLine("ACPI DEBUG: " + value.ToString()); #else Console.WriteLine("ACPI DEBUG: " + value.ToString()); #endif }