| public GetRegister ( int i ) : RegisterStorage | ||
| i | int | |
| Результат | RegisterStorage | |
private Pdp11Instruction DecodeOperands(ushort wOpcode, Opcode opcode, string fmt)
{
List <MachineOperand> ops = new List <MachineOperand>(2);
int i = 0;
dataWidth = PrimitiveType.Word16;
if (fmt.Length == 0)
{
return(new Pdp11Instruction
{
Opcode = opcode,
});
}
switch (fmt[i])
{
case 'b': dataWidth = PrimitiveType.Byte; i += 2; break;
case 'w': dataWidth = PrimitiveType.Word16; i += 2; break;
}
while (i != fmt.Length)
{
if (fmt[i] == ',')
{
++i;
}
MachineOperand op;
switch (fmt[i++])
{
case 'E': op = this.DecodeOperand(wOpcode); break;
case 'e': op = this.DecodeOperand(wOpcode >> 6); break;
case 'r': op = new RegisterOperand(arch.GetRegister((wOpcode >> 6) & 7)); break;
case 'I': op = Imm6(wOpcode); break;
case 'F': op = this.DecodeOperand(wOpcode, true); break;
case 'f': op = FpuAccumulator(wOpcode); break;
default: throw new NotImplementedException();
}
if (op == null)
{
return new Pdp11Instruction {
Opcode = Opcode.illegal
}
}
;
ops.Add(op);
}
var instr = new Pdp11Instruction
{
Opcode = opcode,
DataWidth = dataWidth,
op1 = ops.Count > 0 ? ops[0] : null,
op2 = ops.Count > 1 ? ops[1] : null,
};
return(instr);
}
private Pdp11Instruction Disassemble()
{
ushort opcode = rdr.ReadLeUInt16();
dataWidth = DataWidthFromSizeBit(opcode & 0x8000u);
var decoder = decoders[(opcode >> 0x0C) & 0x00F];
if (decoder != null)
{
return(decoder.Decode(opcode, this));
}
switch ((opcode >> 0x0C) & 0x007)
{
case 0: return(NonDoubleOperandInstruction(opcode));
case 7:
switch ((opcode >> 0x09) & 7)
{
case 0:
dataWidth = PrimitiveType.Word16;
return(new Pdp11Instruction
{
Opcode = Opcode.mul,
DataWidth = dataWidth,
op1 = DecodeOperand(opcode),
op2 = new RegisterOperand(arch.GetRegister((opcode >> 6) & 7)),
});
case 1:
dataWidth = PrimitiveType.Word16;
return(new Pdp11Instruction
{
Opcode = Opcode.div,
DataWidth = dataWidth,
op1 = DecodeOperand(opcode),
op2 = new RegisterOperand(arch.GetRegister((opcode >> 6) & 7)),
});
case 2:
dataWidth = PrimitiveType.Word16;
return(new Pdp11Instruction
{
Opcode = Opcode.ash,
DataWidth = dataWidth,
op1 = DecodeOperand(opcode),
op2 = new RegisterOperand(arch.GetRegister((opcode >> 6) & 7)),
});
case 3:
dataWidth = PrimitiveType.Word16;
return(new Pdp11Instruction
{
Opcode = Opcode.ashc,
DataWidth = dataWidth,
op1 = DecodeOperand(opcode),
op2 = new RegisterOperand(arch.GetRegister((opcode >> 6) & 7)),
});
case 4:
dataWidth = PrimitiveType.Word16;
return(new Pdp11Instruction
{
Opcode = Opcode.xor,
DataWidth = dataWidth,
op1 = DecodeOperand(opcode),
op2 = new RegisterOperand(arch.GetRegister((opcode >> 6) & 7)),
});
case 5:
return(FpuArithmetic(opcode));
case 7:
dataWidth = PrimitiveType.Word16;
return(new Pdp11Instruction
{
Opcode = Opcode.sob,
DataWidth = dataWidth,
op1 = new RegisterOperand(arch.GetRegister((opcode >> 6) & 7)),
op2 = Imm6(opcode),
});
}
throw new NotSupportedException();
default:
throw new NotSupportedException();
}
throw new NotImplementedException();
}
