void BuildAndRunSim(string testbench) { var tcl = new VivadoTCL(); tcl .create_project("test", part: "xa7s6cpga196-2I", verbose: true) .SetProperty("target_language", "Verilog", tcl.CurrentProject) .AddSources(TestSourceFolder, "*.v") .update_compile_order(fileset: "sources_1") .SetProperty("top", "top", tcl.CurrentFileSet) .SetProperty("top", testbench, tcl.Sim1) .SetProperty("SOURCE_SET", "sources_1", tcl.Sim1) .SetProperty("RUNTIME", "0ns", tcl.Sim1) .launch_runs("impl_1", jobs: 4) .wait_on_run("impl_1") .launch_simulation(mode: launch_simulation_mode.post_implementation, type: launch_simulation_type.timing) .restart() .open_vcd(file_name: Path.Combine(TestOutputFolder, "sim.vcd")) .log_vcd(hdl_objects: "*") .run(time: "1000", unit: "ns") .flush_vcd() .close_vcd() .close_sim() ; RunTCL(tcl); }
public static void ProgramBitStream(string bitStreamPath) { string VivadoProjectLocation = Path.Combine(Env.RC.Config.ProjectLocation, "Vivado"); var tcl = new VivadoTCL(); var getHW = tcl.Builder.get_hw_devices(patterns: "xc7z020_1"); tcl .open_hw_manager() .connect_hw_server() .open_hw_target() .current_hw_device(hw_device: getHW) .SetProperty( "PROGRAM.FILE", FileTools.ToUniversalPath(bitStreamPath), getHW ) .program_hw_devices(hw_device: getHW) ; var va = new VivadoAdapter(VivadoProjectLocation); va.SaveTCL(tcl, "program.tcl"); va.RunScript("program.tcl"); }
public static void CreateBitStream(string moduleName) { var config = Env.RC; var hdlPath = Path.Combine(config.Config.ProjectLocation, moduleName); var manualAssetsPath = Path.Combine(Env.AssetsLocation, moduleName); var tcl = new VivadoTCL(); tcl .TCLContent(Path.Combine(Env.ScriptsLocation, "errors.tcl")) .set_msg_config(id: "filemgmt 20-742", new_severity: "ERROR") .create_project("test", part: "xc7z020clg400-1", verbose: true) .SetProperty("target_language", "Verilog", tcl.CurrentProject) .SetProperty("board_part", "digilentinc.com:arty-z7-20:part0:1.0", tcl.CurrentProject) .SetProperty("platform.board_id", "arty-z7-20", tcl.CurrentProject) .AddSources(hdlPath, "*.v") .AddSources(manualAssetsPath) .update_compile_order(fileset: "sources_1") .SetProperty("top", "top", tcl.CurrentFileSet) .SetProperty("SOURCE_SET", "sources_1", tcl.Sim1) .launch_runs("impl_1", to_step: "write_bitstream", jobs: 4) .wait_on_run("impl_1") .Text("exitIfFailed") ; var va = new VivadoAdapter(Env.VivadoProjectLocation); va.CleanupVivado(); va.SaveTCL(tcl); va.RunScript(); }
public void FlatTCL_Custom_CreateProject() { var tcl = new VivadoTCL(new CustomVivadoTCLBuilder()); tcl.create_project("test"); SaveTCL(tcl); Assert.AreEqual("create_project -verbose test", LoadTCLLines()[0]); }
public void FlatTCL_LaunchSim_WriteAttribute() { var tcl = new VivadoTCL(); tcl.launch_simulation(mode: launch_simulation_mode.post_implementation); SaveTCL(tcl); Assert.AreEqual("launch_simulation -mode post-implementation", LoadTCLLines()[0]); }
public void FlatTCL_LaunchSim_NoAttribute() { var tcl = new VivadoTCL(); tcl.launch_simulation(mode: launch_simulation_mode.behavioral); SaveTCL(tcl); Assert.AreEqual("launch_simulation -mode behavioral", LoadTCLLines()[0]); }
public void FlatTCL_CreateProject() { var tcl = new VivadoTCL(); tcl.create_project("test", verbose: true); SaveTCL(tcl); Assert.AreEqual("create_project -verbose test", LoadTCLLines()[0]); }
protected void RunVivadoSimulator() { var snapshot = _simulator.Snapshot; var duration = 500 * 2 * (snapshot.Clock + 1); var tcl = new VivadoTCL(); tcl .create_project("test", part: "xa7s6cpga196-2I", verbose: true) .SetProperty("target_language", "Verilog", tcl.CurrentProject) .AddSources(hdlPath, "*.v") .update_compile_order(fileset: "sources_1") .SetProperty("top", topLevelModule, tcl.CurrentFileSet) .SetProperty("top", testbenchName, tcl.Sim1) .SetProperty("SOURCE_SET", "sources_1", tcl.Sim1) .SetProperty("RUNTIME", "0ns", tcl.Sim1) .launch_runs("impl_1", jobs: 4) .wait_on_run("impl_1") .launch_simulation( mode: launch_simulation_mode.post_implementation, type: launch_simulation_type.timing) .restart() .open_vcd(file_name: VCDFile) .log_vcd(hdl_objects: "*") .run( time: $"{duration}", unit: "ns") .flush_vcd() .close_vcd() .close_sim() ; var va = new VivadoAdapter(VivadoProjectLocation); va.CleanupVivado(); va.SaveTCL(tcl); va.RunScript(); }