protected override void OnUpdateFrame(FrameEventArgs e) { while (_cpu.IOController.IsVBlank) { _cpu.Step(); } CreateProjection(); GenerateTiles(); GenerateSprites(); HandleKeyboard(); while (!_cpu.IOController.IsVBlank) { _cpu.Step(); } }
public void Nop() { _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress] = 0x00; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 1, 4UL); }
private static void TestLength(ulong instructionCount) { Stopwatch watch = Stopwatch.StartNew(); for (ulong i = 0; i < instructionCount; i++) { _cpu.Step(); } watch.Stop(); Console.WriteLine($"{instructionCount} instructions: {watch.Elapsed.TotalMilliseconds}ms"); }
public static void Main(string[] args) { _cart = new Cartridge("Tetris"); for (int i = 0; i < 100; i++) { _cpu = new VirtualCpu(_cart); TestLength(1000000); } Console.ReadLine(); while (_running) { _cpu.Step(); UpdateConsole(); } }
public void JumpRelative() { unchecked { _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 0] = 0x18; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 1] = 10; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 2] = 0x18; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 3] = 0; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 4] = 0x18; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 5] = (byte)-8; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 6] = 0x18; _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + 7] = (byte)-2; } _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 12, 12); _cpu.PC = Cartridge.CodeStartAddress + 2; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 4, 24); _cpu.PC = Cartridge.CodeStartAddress + 4; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress - 2, 36); _cpu.PC = Cartridge.CodeStartAddress + 6; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 6, 48); }
public void IncrementDoubleRegister() { _cpu.Registers[1] = 0xC0; // B _cpu.Registers[2] = 0x10; // C = 0x0110 _cpu.Registers[3] = 0xC0; // D _cpu.Registers[4] = 0x11; // E = 0x0111 _cpu.Registers[5] = 0xFF; // H _cpu.Registers[6] = 0xFF; // L = 0x0112 _cpu.SP = 0xC013; for (int i = 0; i < 4; i++) { _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + i] = (byte)(0x03 + i * 0x10); } _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 1, 8UL); Assert.AreEqual(0xC0, _cpu.Registers[1]); Assert.AreEqual(0x11, _cpu.Registers[2]); _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 2, 16UL); Assert.AreEqual(0xC0, _cpu.Registers[3]); Assert.AreEqual(0x12, _cpu.Registers[4]); _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 3, 24UL); Assert.AreEqual(0x00, _cpu.Registers[5]); Assert.AreEqual(0x00, _cpu.Registers[6]); _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 4, 32UL); Assert.AreEqual((ushort)0xC014, _cpu.SP); }
public void LoadWordRegister(int ri) { byte r = (byte)ri; for (int i = 0; i < 8; i++) { _cpu.LoadedCartridge.Bank0[Cartridge.CodeStartAddress + i] = (byte)(0x40 + i + (r * 8)); } _cpu.WriteMemory(0xC012, 0xAA); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 1, 4); Assert.AreEqual((byte)0x02, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 2, 8); Assert.AreEqual((byte)0x03, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 3, 12); Assert.AreEqual((byte)0x04, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 4, 16); Assert.AreEqual((byte)0x05, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 5, 20); Assert.AreEqual((byte)0x06, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 6, 24); Assert.AreEqual((byte)0x07, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0xC0; // H _cpu.Registers[6] = 0x12; // L = 0xC012 _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 7, 32); Assert.AreEqual((byte)0xAA, _cpu.ReadRTable(r)); _cpu.Registers[0] = 0x01; _cpu.Registers[1] = 0x02; _cpu.Registers[2] = 0x03; _cpu.Registers[3] = 0x04; _cpu.Registers[4] = 0x05; _cpu.Registers[5] = 0x06; _cpu.Registers[6] = 0x07; _cpu.Step(); Assert.That.CpuIsInState(_cpu, Cartridge.CodeStartAddress + 8, 36); Assert.AreEqual((byte)0x01, _cpu.ReadRTable(r)); }