public TCPUDisassembler(IDisassemblable cpu) { if (!mapping.ContainsKey(cpu.Architecture)) { throw new ArgumentOutOfRangeException("arch"); } Disassemble = cpu.Architecture == "arm-m" ? CortexMAddressTranslator.Wrap(mapping[cpu.Architecture]) : mapping[cpu.Architecture]; }
public IDisassembler CreateDisassembler(string type, IDisassemblable cpu) { var disassemblerType = TypeManager.Instance.AutoLoadedTypes.Where(x => x.GetCustomAttribute <DisassemblerAttribute>() != null && x.GetCustomAttribute <DisassemblerAttribute>().Name == type && x.GetCustomAttribute <DisassemblerAttribute>().Architectures.Contains(cpu.Architecture)).SingleOrDefault(); return(disassemblerType == null ? null : (IDisassembler)disassemblerType.GetConstructor(new [] { typeof(IDisassemblable) }).Invoke(new [] { cpu })); }
public IDisassembler CreateDisassembler(string type, IDisassemblable cpu) { var disassemblerType = TypeManager.Instance.AutoLoadedTypes.Where(x => x.GetCustomAttribute<DisassemblerAttribute>() != null && x.GetCustomAttribute<DisassemblerAttribute>().Name == type && x.GetCustomAttribute<DisassemblerAttribute>().Architectures.Contains(cpu.Architecture)).SingleOrDefault(); return disassemblerType == null ? null : (IDisassembler)disassemblerType.GetConstructor(new [] { typeof(IDisassemblable) }).Invoke(new [] { cpu }); }
public LinkedDisassemblable(IDisassemblable baseDisassembler, int numCores) { _baseDisassembler = baseDisassembler; string[] cpus = new string[numCores]; for (int i = 0; i < numCores; i++) { cpus[i] = $"P{i + 1} " + baseDisassembler.Cpu; } AvailableCpus = cpus; }
public LLVMDisassembler(IDisassemblable cpu) { if (!SupportedArchitectures.ContainsKey(cpu.Architecture)) { throw new ArgumentOutOfRangeException("cpu"); } this.cpu = cpu; cache = new Dictionary <string, IDisassembler>(); }
public LLVMDisassembler(IDisassemblable cpu) { if (!SupportedArchitectures.ContainsKey(cpu.Architecture)) { throw new ArgumentOutOfRangeException("cpu"); } this.cpu = cpu; cache = new Dictionary<string, LLVMDisasWrapper>(); Disassemble = cpu.Architecture == "arm-m" ? CortexMAddressTranslator.Wrap(LLVMDisassemble) : LLVMDisassemble; }
public LLVMDisassembler(IDisassemblable cpu) { if (!SupportedArchitectures.ContainsKey(cpu.Architecture)) { throw new ArgumentOutOfRangeException("cpu"); } this.cpu = cpu; cache = new Dictionary <string, LLVMDisasWrapper>(); Disassemble = cpu.Architecture == "arm-m" ? CortexMAddressTranslator.Wrap(LLVMDisassemble) : LLVMDisassemble; }
public CallbackBasedTraceBuffer(IDebuggable debuggableCore, IMemoryDomains memoryDomains, IDisassemblable disassembler) { if (!debuggableCore.MemoryCallbacksAvailable()) { throw new InvalidOperationException("Memory callbacks are required"); } try { debuggableCore.GetCpuFlagsAndRegisters(); } catch (NotImplementedException) { throw new InvalidOperationException("GetCpuFlagsAndRegisters is required"); } Header = "Instructions"; DebuggableCore = debuggableCore; MemoryDomains = memoryDomains; Disassembler = disassembler; }
protected CallbackBasedTraceBuffer(IDebuggable debuggableCore, IMemoryDomains memoryDomains, IDisassemblable disassembler, string header = DEFAULT_HEADER) { if (!debuggableCore.MemoryCallbacksAvailable()) { throw new InvalidOperationException("Memory callbacks are required"); } try { debuggableCore.GetCpuFlagsAndRegisters(); } catch (NotImplementedException) { throw new InvalidOperationException($"{nameof(IDebuggable.GetCpuFlagsAndRegisters)} is required"); } Header = header; DebuggableCore = debuggableCore; MemoryDomains = memoryDomains; Disassembler = disassembler; }
public DisassemblyEngine(IDisassemblable disasm, Func <ulong, ulong> addressTranslator) { this.cpu = disasm; this.AddressTranslator = addressTranslator; }
public DisassemblyEngine(IDisassemblable disasm, Func<uint, uint> addressTranslator) { this.cpu = disasm; this.AddressTranslator = addressTranslator; }
public GPGXTraceBuffer(IDebuggable debuggableCore, IMemoryDomains memoryDomains, IDisassemblable disassembler) : base(debuggableCore, memoryDomains, disassembler) { Header = "M68K: PC, machine code, mnemonic, operands, registers (D0-D7, A0-A7, SR, USP), flags (XNZVC)"; }
public static IDisassembler CreateDisassembler(DisassemblerType type, IDisassemblable cpu) { var disas = RegisteredDisassemblers[type]; return !(disas.IsAvailable() && disas.IsAvailableForArchitecture(cpu.Architecture)) ? null : RegisteredDisassemblers[type].Construct(cpu); }
public GPGXTraceBuffer(IDebuggable debuggableCore, IMemoryDomains memoryDomains, IDisassemblable disassembler) : base(debuggableCore, memoryDomains, disassembler) { Header = "M68K: PC, machine code, mnemonic, arguments, registers (D0-D7, A0-A7, SR, USP, status flags)"; }
private void SetDefaultDisassemblable() { _selectedDisassemblable = GetAvailableDisassemblables().First(); }
public static IDisassembler CreateDisassembler(DisassemblerType type, IDisassemblable cpu) { var disas = RegisteredDisassemblers[type]; return(!(disas.IsAvailable() && disas.IsAvailableForArchitecture(cpu.Architecture)) ? null : RegisteredDisassemblers[type].Construct(cpu)); }
public GPGXTraceBuffer(IDebuggable debuggableCore, IMemoryDomains memoryDomains, IDisassemblable disassembler) : base(debuggableCore, memoryDomains, disassembler, TRACE_HEADER) { }