protected void CondSkipIndirect(Expression cond, FSRIndexedMode indMode, Expression memPtr)
{
rtlc = RtlClass.ConditionalTransfer;
switch (indMode)
{
case FSRIndexedMode.None:
case FSRIndexedMode.INDF:
case FSRIndexedMode.PLUSW:
m.Branch(cond, SkipToAddr(), rtlc);
break;
case FSRIndexedMode.POSTINC:
m.BranchInMiddleOfInstruction(cond, SkipToAddr(), rtlc);
m.Assign(memPtr, m.IAdd(memPtr, 1));
break;
case FSRIndexedMode.POSTDEC:
m.BranchInMiddleOfInstruction(cond, SkipToAddr(), rtlc);
m.Assign(memPtr, m.ISub(memPtr, 1));
break;
case FSRIndexedMode.PREINC:
m.Assign(memPtr, m.IAdd(memPtr, 1));
m.Branch(cond, SkipToAddr(), rtlc);
break;
}
}
protected void ArithAssignIndirect(Expression dst, Expression src, FSRIndexedMode indMode, Expression memPtr)
{
switch (indMode)
{
case FSRIndexedMode.None:
ArithAssign(dst, src);
break;
case FSRIndexedMode.INDF:
case FSRIndexedMode.PLUSW:
ArithAssign(dst, src);
break;
case FSRIndexedMode.POSTDEC:
ArithAssign(dst, src);
m.Assign(memPtr, m.ISub(memPtr, 1));
break;
case FSRIndexedMode.POSTINC:
ArithAssign(dst, src);
m.Assign(memPtr, m.IAdd(memPtr, 1));
break;
case FSRIndexedMode.PREINC:
m.Assign(memPtr, m.IAdd(memPtr, 1));
ArithAssign(dst, src);
break;
}
}
/// <summary>
/// Instantiates a FSR indexation mode operand.
/// </summary>
/// <param name="fsr">The index register.</param>
/// <param name="off">The offset relative to the FSR register content.</param>
/// <param name="mode">The indexation mode with the FSR.</param>
public PICOperandFSRIndexation(ushort fsrnum, Constant off, FSRIndexedMode mode) : base(PrimitiveType.Byte)
{
FSRNum = (byte)fsrnum;
Offset = off;
Mode = mode;
}
protected void ArithCondSkip(Expression dst, Expression src, Expression cond, FSRIndexedMode indMode, Expression memPtr)
{
iclass = InstrClass.ConditionalTransfer;
switch (indMode)
{
case FSRIndexedMode.None:
m.Assign(dst, src);
m.Branch(cond, SkipToAddr(), iclass);
break;
case FSRIndexedMode.INDF:
case FSRIndexedMode.PLUSW:
m.Assign(dst, src);
m.Branch(cond, SkipToAddr(), iclass);
break;
case FSRIndexedMode.POSTDEC:
m.Assign(dst, src);
m.BranchInMiddleOfInstruction(cond, SkipToAddr(), iclass);
m.Assign(memPtr, m.ISub(memPtr, 1));
break;
case FSRIndexedMode.POSTINC:
m.Assign(dst, src);
m.BranchInMiddleOfInstruction(cond, SkipToAddr(), iclass);
m.Assign(memPtr, m.IAdd(memPtr, 1));
break;
case FSRIndexedMode.PREINC:
m.Assign(memPtr, m.IAdd(memPtr, 1));
m.Assign(dst, src);
m.Branch(cond, SkipToAddr(), iclass);
break;
}
}
