internal static CircuitGraph VerifyCanCreateGraph(string firrtl, CircuitGraph lowFirGraph = null) { Circuit circuit = FIRRTL.Parse.FromString(firrtl); CircuitGraph graph = CircuitToGraph.GetAsGraph(circuit, lowFirGraph); return(graph); }
internal static void VerifyInferTypes(string moduleName, string extension, bool isVerilogVCD, string modulePath) { CircuitGraph graph = VerifyMakeGraph(moduleName, extension, modulePath); using VCD vcd = LoadVCD(moduleName, modulePath); foreach (var variables in vcd.Variables) { foreach (var variable in variables) { ScalarIO varCon = graph.GetConnection(variable, isVerilogVCD); if (varCon == null) { continue; } ref BinaryVarValue actual = ref varCon.GetValue(); if (!varCon.Value.IsInitialized()) { continue; } if (variable.Size != actual.Bits.Length) { Console.WriteLine($"Ref: {variable.Reference}, Expected: {variable.Size}, Actual: {actual.Bits.Length}"); } Assert.AreEqual(variable.Size, actual.Bits.Length); } }
internal static void VerifyComputeGraph(string moduleName, string extension, bool isVerilogVCD, string modulePath) { CircuitGraph graph = VerifyMakeGraph(moduleName, extension, modulePath); VCDTimeline timeline = MakeTimeline(moduleName, modulePath); VerifyCircuitState(graph, timeline, isVerilogVCD); }
private static CircuitGraph VerifyCanCreateGraphFromFile(string firrtlPath, CircuitGraph lowFirGraph = null) { using FileStream fileStream = new FileStream(firrtlPath, FileMode.Open, FileAccess.Read, FileShare.ReadWrite); Circuit circuit = FIRRTL.Parse.FromStream(fileStream); CircuitGraph graph = CircuitToGraph.GetAsGraph(circuit, lowFirGraph); return(graph); }
internal static CircuitGraph VerifyMakeGraph(string moduleName, string extension, string modulePath) { CircuitGraph lowFirGraph = null; if (extension == "fir") { string loFirPath = Path.Combine(modulePath, $"{moduleName}.lo.fir"); lowFirGraph = VerifyCanCreateGraphFromFile(loFirPath); } string firPath = Path.Combine(modulePath, $"{moduleName}.{extension}"); return(VerifyCanCreateGraphFromFile(firPath, lowFirGraph)); }
internal static void VerifyChiselTest(string moduleName, string extension) { const string modulePath = "ChiselTests"; CircuitGraph lowFirGraph = null; if (extension == "fir") { string loFirPath = Path.Combine(modulePath, $"{moduleName}.lo.fir"); lowFirGraph = VerifyCanCreateGraphFromFile(loFirPath); } string firPath = Path.Combine(modulePath, $"{moduleName}.{extension}"); CircuitGraph graph = VerifyCanCreateGraphFromFile(firPath, lowFirGraph); using VCD vcd = VCDReader.Parse.FromFile($"{modulePath}/{moduleName}.vcd"); VCDTimeline timeline = new VCDTimeline(vcd); VerifyCircuitState(graph, timeline, isLoFIRRTL(extension), false); }
internal static void VerifyCircuitState(CircuitGraph graph, VCDTimeline timeline, bool isVerilogVCD) { graph.SetState(timeline.GetStateAtTime(timeline.TimeInterval.StartInclusive), isVerilogVCD); Stopwatch timer = new Stopwatch(); timer.Start(); int i = 0; foreach (var state in timeline.GetAllDistinctStates()) { if (state.Time == timeline.TimeInterval.InclusiveEnd()) { break; } graph.SetState(state, isVerilogVCD); graph.ComputeRemainingGraphFast(); const int reportEveryXTimeStates = 20_000; if (i++ % reportEveryXTimeStates == 0) { timer.Stop(); float msPerState = (float)timer.ElapsedMilliseconds / reportEveryXTimeStates; float statesPerMs = 1.0f / msPerState; float statesPerSecs = statesPerMs * 1000.0f; float totalRemainingMs = msPerState * (timeline.StateCount - i); const int msPerSec = 1_000; float remainingSeconds = totalRemainingMs / msPerSec; Console.WriteLine($"{i}/{timeline.StateCount} Remaining: {remainingSeconds.ToString("N0")} States/sec: {statesPerSecs.ToString("N0")}"); timer.Restart(); } } timer.Stop(); }
public DebugController(CircuitGraph graph) { this.Graph = graph; }
public Circuit() { graph = new CircuitGraph(); NumberedInputs = new Dictionary <uint, InputComponent>(); NumberedOutputs = new Dictionary <uint, Output>(); }