public static bool IsConditionTrue(AThreadState State, ACond Cond)
{
switch (Cond)
{
case ACond.Eq: return(State.Zero);
case ACond.Ne: return(!State.Zero);
case ACond.Ge_Un: return(State.Carry);
case ACond.Lt_Un: return(!State.Carry);
case ACond.Mi: return(State.Negative);
case ACond.Pl: return(!State.Negative);
case ACond.Vs: return(State.Overflow);
case ACond.Vc: return(!State.Overflow);
case ACond.Gt_Un: return(State.Carry && !State.Zero);
case ACond.Le_Un: return(!State.Carry && State.Zero);
case ACond.Ge: return(State.Negative == State.Overflow);
case ACond.Lt: return(State.Negative != State.Overflow);
case ACond.Gt: return(State.Negative == State.Overflow && !State.Zero);
case ACond.Le: return(State.Negative != State.Overflow && State.Zero);
}
return(true);
}
private static void EmitBranch(AILEmitterCtx Context, ACond Cond)
{
AOpCodeBImm Op = (AOpCodeBImm)Context.CurrOp;
if (Context.CurrBlock.Next != null &&
Context.CurrBlock.Branch != null)
{
Context.EmitCondBranch(Context.GetLabel(Op.Imm), Cond);
}
else
{
Context.EmitStoreState();
AILLabel LblTaken = new AILLabel();
Context.EmitCondBranch(LblTaken, Cond);
Context.EmitLdc_I8(Op.Position + 4);
Context.Emit(OpCodes.Ret);
Context.MarkLabel(LblTaken);
Context.EmitLdc_I8(Op.Imm);
Context.Emit(OpCodes.Ret);
}
}
public AOpCodeBImmCond(AInst Inst, long Position, int OpCode) : base(Inst, Position)
{
int O0 = (OpCode >> 4) & 1;
if (O0 != 0)
{
Emitter = AInstEmit.Und;
return;
}
Cond = (ACond)(OpCode & 0xf);
Imm = Position + ADecoderHelper.DecodeImmS19_2(OpCode);
}
public AOpCodeCcmp(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
{
int O3 = (OpCode >> 4) & 1;
if (O3 != 0)
{
Emitter = AInstEmit.Und;
return;
}
NZCV = (OpCode >> 0) & 0xf;
Cond = (ACond)((OpCode >> 12) & 0xf);
RmImm = (OpCode >> 16) & 0x1f;
Rd = AThreadState.ZRIndex;
}
public void EmitCondBranch(AILLabel Target, ACond Cond)
{
OpCode ILOp;
int IntCond = (int)Cond;
if (OptOpLastCompare != null &&
OptOpLastCompare == OptOpLastFlagSet && BranchOps.ContainsKey(Cond))
{
Ldloc(Tmp3Index, AIoType.Int, OptOpLastCompare.RegisterSize);
Ldloc(Tmp4Index, AIoType.Int, OptOpLastCompare.RegisterSize);
ILOp = BranchOps[Cond];
}
else if (IntCond < 14)
{
int CondTrue = IntCond >> 1;
switch (CondTrue)
{
case 0: EmitLdflg((int)APState.ZBit); break;
case 1: EmitLdflg((int)APState.CBit); break;
case 2: EmitLdflg((int)APState.NBit); break;
case 3: EmitLdflg((int)APState.VBit); break;
case 4:
EmitLdflg((int)APState.CBit);
EmitLdflg((int)APState.ZBit);
Emit(OpCodes.Not);
Emit(OpCodes.And);
break;
case 5:
case 6:
EmitLdflg((int)APState.NBit);
EmitLdflg((int)APState.VBit);
Emit(OpCodes.Ceq);
if (CondTrue == 6)
{
EmitLdflg((int)APState.ZBit);
Emit(OpCodes.Not);
Emit(OpCodes.And);
}
break;
}
ILOp = (IntCond & 1) != 0
? OpCodes.Brfalse
: OpCodes.Brtrue;
}
else
{
ILOp = OpCodes.Br;
}
Emit(ILOp, Target);
}
public A32OpCode(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
{
Cond = (ACond)((uint)OpCode >> 28);
}
public void EmitCondBranch(AILLabel Target, ACond Cond)
{
OpCode ILOp;
int IntCond = (int)Cond;
if (LastCmpOp != null && LastFlagOp == LastCmpOp && BranchOps.ContainsKey(Cond))
{
Ldloc(Tmp3Index, AIoType.Int, GetIntType(LastCmpOp));
Ldloc(Tmp4Index, AIoType.Int, GetIntType(LastCmpOp));
if (LastCmpOp.Emitter == AInstEmit.Adds)
{
Emit(OpCodes.Neg);
}
ILOp = BranchOps[Cond];
}
else if (IntCond < 14)
{
int CondTrue = IntCond >> 1;
switch (CondTrue)
{
case 0: EmitLdflg((int)APState.ZBit); break;
case 1: EmitLdflg((int)APState.CBit); break;
case 2: EmitLdflg((int)APState.NBit); break;
case 3: EmitLdflg((int)APState.VBit); break;
case 4:
EmitLdflg((int)APState.CBit);
EmitLdflg((int)APState.ZBit);
Emit(OpCodes.Not);
Emit(OpCodes.And);
break;
case 5:
case 6:
EmitLdflg((int)APState.NBit);
EmitLdflg((int)APState.VBit);
Emit(OpCodes.Ceq);
if (CondTrue == 6)
{
EmitLdflg((int)APState.ZBit);
Emit(OpCodes.Not);
Emit(OpCodes.And);
}
break;
}
ILOp = (IntCond & 1) != 0
? OpCodes.Brfalse
: OpCodes.Brtrue;
}
else
{
ILOp = OpCodes.Br;
}
Emit(ILOp, Target);
}
public AOpCodeCsel(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
{
Rm = (OpCode >> 16) & 0x1f;
Cond = (ACond)((OpCode >> 12) & 0xf);
}
public AOpCodeSimdFcond(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
{
NZCV = (OpCode >> 0) & 0xf;
Cond = (ACond)((OpCode >> 12) & 0xf);
}
