/// <summary>
/// 普通导通测试支路
/// </summary>
public LogicNet[] Load24VBranches(int logicMaxNetNum)
{
AppProject pro = AppProject.GetInstance();
nets.Clear();
List <TNode> cfs = pro.GetCFNodes();
int Count = cfs.Count;
BranchNet[] _nets = new BranchNet[Count];
LogicNet[] pnets = new LogicNet[Count];
for (int i = 0; i < Count; i++)
{
BranchNet net = new BranchNet(MaxNetNum + 1);
this.nets.Add(net);
LogicNet pnet = new LogicNet(++logicMaxNetNum);
List <TestBranch> normbr = new List <TestBranch>();
TestBranch branch = new TestBranch();
branch.TryAddNode(cfs[i]);
normbr.Add(branch);
Get24VBranches(normbr, ref net, ref pnet);
_nets[i] = net;
pnets[i] = pnet;
}
pro.Nodes.ForEach(p => p.HasIncluded = false);
return(pnets);
}
/// <summary>
/// 分解支路网络
/// 将含有相同逻辑元件的支路
/// 分配进相同的网络
/// </summary>
public IEnumerable <LogicNet> Split(int maxNum)
{
List <LogicNet> newNets = new List <LogicNet>();
branches.Sort((i, j) =>
{
if (i.Count > j.Count)
{
return(1);
}
else if (i.Count < j.Count)
{
return(-1);
}
else
{
return(0);
}
});
int count = branches.Count;
bool[] marks = new bool[count];
for (int i = 0; i < count; i++)
{
marks[i] = false;
}
for (int i = count - 1; i >= 0; i--)
{
if (marks[i])
{
continue;
}
LogicNet net = new LogicNet(++maxNum);
net.branches.Add(branches[i]);
for (int j = i - 1; j >= 0; j--)
{
if (!branches[i].Equals(branches[j]) && !marks[j])
{
bool isContain = branches[j].LogicNodes.All(p =>
branches[i].LogicNodes.Count == branches[j].LogicNodes.Count &&
branches[i].LogicNodes.Contains(p, AppProject.cmpNode));
if (isContain)
{
marks[j] = true;
net.branches.Add(branches[j]);
}
}
}
newNets.Add(net);
}
return(newNets);
}
/// <summary>
/// 导出110V测试网络
/// </summary>
public DataView Load110VBranches(bool save)
{
LogicNet rst = vccNet.Load110VBranches(lgicNets.MaxNetNum);
lgicNets.Nets.Add(rst);
if (save)
{
return(vccNet.SaveBranchesToExcel());
}
else
{
return(null);
}
}
/// <summary>
/// 获得与总正相连接的支路
/// </summary>
public LogicNet Load110VBranches(int logicMaxNetNum)
{
AppProject pro = AppProject.GetInstance();
nets.Clear();
BranchNet net = new BranchNet(MaxNetNum + 1);
nets.Add(net);
LogicNet pnet = new LogicNet(logicMaxNetNum + 1);
List <TNode> vccnd = pro.GetSetTerminal(p => p.Type == NamesManage.Positive);
List <TestBranch> vccbr = new List <TestBranch>();
vccnd.ForEach(p =>
{
TestBranch br = new TestBranch();
br.TryAddNode(p);
vccbr.Add(br);
});
Get110VBranches(vccbr, ref net, ref pnet);
pro.Nodes.ForEach(p => p.HasIncluded = false);
return(pnet);
}
/// <summary>
/// 获得与总正相连接的支路(递归广度)
/// </summary>
private void Get110VBranches(List <TestBranch> branches, ref BranchNet net, ref LogicNet positiveNet)
{
AppProject pro = AppProject.GetInstance();
List <TestBranch> nextBranches = new List <TestBranch>();
foreach (var branch in branches)
{
TNode node = branch.LastNode;
if (node.HasIncluded)
{
continue;
}
foreach (var child in node.Nodes)
{
TestBranch cbranch = branch.Clone();
if (!child.HasIncluded)
{
if (child.PartType == "端子排" && child.TNType != TerminalType.Block)
{
if (cbranch.AllTB)
{
cbranch.Clear();
}
bool success = cbranch.TryAddNode(child);
if (success)
{
nextBranches.Add(cbranch);
}
}
else if (child.TNType == TerminalType.RE ||
child.TNType == TerminalType.BreakerContact ||
child.TNType == TerminalType.DiodePositive ||
child.TNType == TerminalType.DiodeNegative ||
child.TNType == TerminalType.Coil ||
child.TNType == TerminalType.ContactNormalClose ||
child.TNType == TerminalType.ContactNormalOpen ||
child.TNType == TerminalType.ContactCom ||
child.TNType == TerminalType.Switch ||
child.TNType == TerminalType.Indicator)
{
bool success = cbranch.TryAddNode(child);
if (success)
{
nextBranches.Add(cbranch);
}
}
else if (child.PartType == "接口连接器")
{
bool success = cbranch.TryAddNode(child);
/*是否含有逻辑元件*/
if (cbranch.HasLogicElement)
{
if (success)
{
positiveNet.Branches.Add(cbranch);
}
}
else
{
if (success)
{
net.Branches.Add(cbranch);
}
}
cbranch = new TestBranch();
success = cbranch.TryAddNode(child);
if (success)
{
nextBranches.Add(cbranch);
}
}
}
}
node.HasIncluded = true;
}
if (nextBranches.Count != 0)
{
Get110VBranches(nextBranches, ref net, ref positiveNet);
}
}