/// <summary>
/// Initalize device
/// </summary>
public unsafe void InitDevice()
{
// Check if its a memory bar
if ((mPciDevice.BAR5.flags & Pci.BAR_IO) > 0)
{
Console.WriteLine("[AHCI] Device not MMIO!");
return;
}
// Enable bus mastering
Pci.EnableBusMastering(mPciDevice);
int size = sizeof(AHCI_Generic_registers) + (sizeof(AHCI_Port_registers) * 32);
mAddress = (int)mPciDevice.BAR5.Address;
mAddressVirtual = (int)Paging.MapToVirtual(Paging.CurrentDirectory, mAddress, size, Paging.PageFlags.Writable | Paging.PageFlags.Present);
mGenericRegs = (AHCI_Generic_registers *)mAddressVirtual;
mPorts = (AHCI_Port_registers *)(mAddressVirtual + 0x100);
ReadCapabilties();
initPorts();
Console.Write("[AHCI] Initalized at 0x");
Console.WriteHex(mAddress & 0xFFFFFFFF);
Console.WriteLine("");
}
/// <summary>
/// Initialize
/// </summary>
public static void Init()
{
Pci.PciDriver driver = new Pci.PciDriver();
driver.Name = "RTL8139 Driver";
driver.Exit = exitHandler;
driver.Init = initHandler;
Pci.RegisterDriver(0x10EC, 0x8139, driver);
}
/// <summary>
/// Initialization
/// </summary>
public static void Init()
{
Pci.PciDriver driver = new Pci.PciDriver();
driver.Name = "VboxDev driver";
driver.Exit = exitHander;
driver.Init = initHandler;
Pci.RegisterDriver(0x80EE, 0xCAFE, driver);
}
/// <summary>
/// Registers the Intel HD driver
/// </summary>
public static void Init()
{
Pci.PciDriver driver = new Pci.PciDriver();
driver.Name = "Intel HD Driver";
driver.Exit = exitHander;
driver.Init = initHandler;
Pci.RegisterDriver(0x8086, 0x2668, driver);
}
/// <summary>
/// Initializes
/// </summary>
public static void Init()
{
Pci.PciDriver driver = new Pci.PciDriver();
driver.Name = "PC-NET 2 driver Driver";
driver.Exit = exitHandler;
driver.Init = initHandler;
Pci.RegisterDriver(0x1022, 0x2000, driver);
}
/// <summary>
/// Initialize nvme device
/// </summary>
public void InitDevice()
{
CurrentCID = 1;
mAddress = (int)mDevice.BAR0.Address;
mAddressVirtual = (int)Paging.MapToVirtual(Paging.CurrentDirectory, mAddress, 0x1000, Paging.PageFlags.Present | Paging.PageFlags.Writable);
mRegs = (NVMe_Registers *)mAddressVirtual;
Pci.EnableBusMastering(mDevice);
// TODO: Make this map the right size
mTailsAndHeads = (int *)Paging.MapToVirtual(Paging.CurrentDirectory, mAddress + 0x1000, 0x4000, Paging.PageFlags.Present | Paging.PageFlags.Writable);
ReadCapabilities();
ReadVersion();
ConfigureAdminQueue();
EnableController();
DoIdentify();
CreateQueues();
char *name = (char *)Heap.Alloc(6);
name[0] = 'N';
name[1] = 'V';
name[2] = 'M';
name[3] = 'E';
name[4] = (char)('0' + mID++);
name[5] = '\0';
string nameStr = Util.CharPtrToString(name);
Node node = new Node();
node.Read = readImpl;
node.Write = writeImpl;
NVMeCookie cookie = new NVMeCookie();
cookie.NVMe = this;
node.Cookie = cookie;
Disk.InitalizeNode(node, nameStr);
RootPoint dev = new RootPoint(nameStr, node);
VFS.MountPointDevFS.AddEntry(dev);
Console.Write("[NVME] Init with serialnumber ");
for (int i = 0; i < 20; i++)
{
Console.Write(mSerialNumber[i]);
}
Console.WriteLine("");
}
private static unsafe void initHandler(PciDevice dev)
{
buffer = new byte[2048];
m_dev = dev;
m_io_base = (ushort)(dev.BAR0.Address);
Pci.EnableBusMastering(dev);
Pci.EnableIOSpace(dev);
/**
* Read current mac
*/
ReadMac();
/**
* Do a software reset because we want 32bitjes :)
*/
SoftwareReset();
writeCSR(0, 0x04);
/**
* Initalize buffers
*/
InitBuffers();
InitCard();
/**
* Set interrupt
*/
Pci.SetInterruptHandler(dev, handler);
// Enable card
writeCSR(0, 0x41);
writeCSR(4, 0x4C00 | readCSR(4));
writeCSR(0, 0x42);
/**
* Register device as the main network device
*/
Network.NetDevice netDev = new Network.NetDevice();
netDev.ID = dev.Device;
netDev.Transmit = Transmit;
netDev.GetMac = GetMac;
Network.Set(netDev);
}
/// <summary>
/// Register driver
/// </summary>
public static void Init()
{
Pci.PciDriver driver = new Pci.PciDriver();
driver.Name = "E1000 Driver";
driver.Exit = exitHandler;
driver.Init = initHandler;
Pci.RegisterDriver(MANUID_INTEL, DEVID_EMU, driver);
Pci.RegisterDriver(MANUID_INTEL, DEVID_82545EM, driver);
Pci.RegisterDriver(MANUID_INTEL, DEVID_82545EMA, driver);
Pci.RegisterDriver(MANUID_INTEL, DEVID_82545EMAF, driver);
}
/// <summary>
/// Driver initialization
/// </summary>
/// <param name="dev">PCI Device</param>
private static void initHandler(PciDevice dev)
{
m_dev = dev;
m_nambar = (ushort)dev.BAR0.Address;
m_nabmbar = (ushort)dev.BAR1.Address;
// Set IRQ handler and bus mastering and I/O space
Pci.SetInterruptHandler(dev, handler);
Pci.EnableBusMastering(dev);
Pci.EnableIOSpace(dev);
// Enable all interrupts
PortIO.Out8((ushort)(m_nabmbar + REG_CR), (CR_FEIE | CR_IOCE | CR_LVBIE));
// Volume
ushort volume = 0x03 | (0x03 << 8);
PortIO.Out16((ushort)(m_nambar + MASTER_VOLUME), volume);
PortIO.Out16((ushort)(m_nambar + PCM_OUT_VOLUME), volume);
// Buffers
m_bdls = new BDL_Entry[BDL_COUNT];
m_bufs = new ushort[BDL_COUNT][];
for (int i = 0; i < BDL_COUNT; i++)
{
m_bufs[i] = new ushort[AudioFS.BufferSize];
fixed(void *ptr = m_bufs[i])
{
m_bdls[i].pointer = Paging.GetPhysicalFromVirtual(ptr);
}
// Length and interrupt-on-clear
m_bdls[i].cl = AudioFS.BufferSize & 0xFFFF;
m_bdls[i].cl |= CL_IOC;
}
// Tell BDL location
fixed(void *ptr = m_bdls)
{
PortIO.Out32((ushort)(m_nabmbar + REG_BDBAR), (uint)Paging.GetPhysicalFromVirtual(ptr));
}
// Set last valid index
m_lvi = 3;
PortIO.Out8((ushort)(m_nabmbar + REG_LVI), (byte)m_lvi);
// Set audio to playing
PortIO.Out8((ushort)(m_nabmbar + REG_CR), (byte)(PortIO.In8((ushort)(m_nabmbar + REG_CR)) | CR_RPBM));
Console.WriteLine("[AC97] Initialized");
}
/// <summary>
/// PCI init handler
/// </summary>
/// <param name="dev"></param>
private static unsafe void initHandler(PciDevice dev)
{
m_register_base = (uint)dev.BAR0.Address;
m_flash_base = (uint)dev.BAR1.Address;
/**
* Check if there is a memory bar
*/
if ((dev.BAR0.flags & Pci.BAR_IO) > 0)
{
Console.WriteLine("[E1000] Device not MMIO!");
return;
}
m_packetBuffer = new byte[9500];
/**
* Enable bus mastering
*/
Pci.EnableBusMastering(dev);
/**
* Map device
*/
m_register_base = (uint)Paging.MapToVirtual(Paging.KernelDirectory, (int)m_register_base, 20 * 0x1000, Paging.PageFlags.Writable | Paging.PageFlags.Present);
Pci.SetInterruptHandler(dev, handler);
readMac();
start();
/**
* Waiting for link to go up
*/
Console.WriteLine("[E1000] Waiting for link to go up....");
while (m_linkup == 0)
{
CPU.HLT();
}
/**
* Register device as the main network device
*/
Network.NetDevice netDev = new Network.NetDevice();
netDev.ID = dev.Device;
netDev.Transmit = Transmit;
netDev.GetMac = GetMac;
Network.Set(netDev);
}
/// <summary>
/// Registers the AC97 driver
/// </summary>
public static void Init()
{
Pci.PciDriver driver = new Pci.PciDriver();
driver.Name = "AC97 Driver";
driver.Exit = exitHander;
driver.Init = initHandler;
Pci.RegisterDriver(0x8086, 0x2415, driver);
// TODO
AudioFS.SoundDevice device = new AudioFS.SoundDevice();
device.Name = "AC97 audio device";
device.Writer = Writer;
device.Reader = Reader;
AudioFS.SetDevice(device);
}
/// <summary>
/// Init PCI devices
/// </summary>
private static void initPCIDevices()
{
Pci.Init();
VboxDev.Init();
PciFS.LoadDevices();
}
public static void process()
{
var pc = new Pci();
pc.Print();
}
public static int AcpiOsWritePciConfiguration(PciID *PciId, uint Register, ulong Value, uint Width)
{
Pci.Write(PciId->Bus, PciId->Device, PciId->Function, (ushort)Register, (uint)Value, Width / 8);
return(AE_OK);
}
public static int AcpiOsReadPciConfiguration(PciID *PciId, uint Register, ulong *Value, uint Width)
{
*Value = Pci.Read(PciId->Bus, PciId->Device, PciId->Function, (ushort)Register, Width / 8);
return(AE_OK);
}
/// <summary>
/// Initialization handler
/// </summary>
/// <param name="dev">This PCI device</param>
private static unsafe void initHandler(PciDevice dev)
{
m_io_base = (ushort)(dev.BAR0.Address);
/**
* Check if I/O bar
*/
if ((dev.BAR0.flags & Pci.BAR_IO) == 0)
{
Console.WriteLine("[RTL8139] RTL8139 should be an I/O bar, not a memory bar!");
return;
}
/**
* Set interrupt
*/
Pci.SetInterruptHandler(dev, handler);
/**
* Enable bus mastering
*/
Pci.EnableBusMastering(dev);
/**
* Enable device
*/
PortIO.Out8((ushort)(m_io_base + REG_CONF1), 0);
/**
* Do a software reset
*/
softwareReset();
/**
* Initalize and allocate buffers
*/
initializeBuffers();
/**
* Setup interrupts
*/
setInterruptMask(IMR_TOK | IMR_TER | IMR_ROK | IMR_RER);
/**
* Initalize transmit
*/
txInit();
/**
* Initalize receive
*/
rxInit();
/**
* Read mac address
*/
readMac();
/**
* Update link status
*/
updateLinkStatus();
/**
* Enable receiving and transmitting!
*/
PortIO.Out8((ushort)(m_io_base + REG_CMD), CMD_TE | CMD_RE);
Console.WriteLine("[RTL8139] Initialized");
/**
* Register device as the main network device
*/
Network.NetDevice netDev = new Network.NetDevice();
netDev.ID = dev.Device;
netDev.Transmit = Transmit;
netDev.GetMac = GetMac;
Network.Set(netDev);
}
private static void initDevice(PciDevice dev)
{
if ((dev.BAR4.flags & Pci.BAR_IO) == 0)
{
Console.WriteLine("[UHCI] Only Portio supported");
}
Pci.EnableBusMastering(dev);
UHCIController uhciDev = new UHCIController();
uhciDev.IOBase = (ushort)dev.BAR4.Address;
uhciDev.Poll = Poll;
Console.Write("[UHCI] Initalize at 0x");
Console.WriteHex(uhciDev.IOBase);
Console.WriteLine("");
uhciDev.FrameList = (int *)Heap.AlignedAlloc(0x1000, sizeof(int) * 1024);
uhciDev.QueueHeadPool = (UHCIQueueHead *)Heap.AlignedAlloc(0x1000, sizeof(UHCIQueueHead) * MAX_HEADS);
uhciDev.TransmitPool = (UHCITransmitDescriptor *)Heap.AlignedAlloc(0x1000, sizeof(UHCITransmitDescriptor) * MAX_TRANSMIT);
Memory.Memclear(uhciDev.QueueHeadPool, sizeof(UHCIQueueHead) * MAX_HEADS);
Memory.Memclear(uhciDev.TransmitPool, sizeof(UHCITransmitDescriptor) * MAX_TRANSMIT);
UHCIQueueHead *head = GetQueueHead(uhciDev);
head->Head = TD_POINTER_TERMINATE;
head->Element = TD_POINTER_TERMINATE;
uhciDev.FirstHead = head;
for (int i = 0; i < 1024; i++)
{
uhciDev.FrameList[i] = TD_POINTER_QH | (int)Paging.GetPhysicalFromVirtual(head);
}
PortIO.Out16((ushort)(uhciDev.IOBase + REG_LEGSUP), 0x8f00);
/**
* Initalize framelist
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_FRNUM), 0);
PortIO.Out32((ushort)(uhciDev.IOBase + REG_FRBASEADD), (uint)Paging.GetPhysicalFromVirtual(uhciDev.FrameList));
PortIO.Out8(((ushort)(uhciDev.IOBase + REG_SOFMOD)), 0x40); // Ensure default value of 64 (aka cycle time of 12000)
/**
* We are going to poll!
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBINTR), 0x00);
/**
* Clear any pending statusses
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBSTS), 0xFFFF);
/**
* Enable device
*/
PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBCMD), USBCMD_RS);
probe(uhciDev);
Sharpen.USB.USB.RegisterController(uhciDev);
}
private unsafe static void initDevice(PciDevice dev)
{
if ((dev.BAR0.flags & Pci.BAR_IO) != 0)
{
Console.WriteLine("[EHCI] Only Memory mapped IO supported");
}
/**
* Enable bus mastering
*/
Pci.EnableBusMastering(dev);
ulong barAddress = dev.BAR0.Address;
EHCIController controller = new EHCIController();
controller.MemoryBase = (int)Paging.MapToVirtual(Paging.KernelDirectory, (int)barAddress, 20 * 0x1000, Paging.PageFlags.Writable | Paging.PageFlags.Present);
controller.FrameList = (int *)Heap.AlignedAlloc(0x1000, sizeof(int) * 1024);
controller.CapabilitiesRegisters = (EHCIHostCapRegister *)(controller.MemoryBase);
controller.OperationalRegisters = controller.MemoryBase + (*controller.CapabilitiesRegisters).CapLength;
controller.PortNum = ReadPorts(controller);
controller.QueueHeadPool = (EHCIQueueHead *)Heap.AlignedAlloc(0x1000, sizeof(EHCIQueueHead) * MAX_HEADS);
controller.TransferPool = (EHCITransferDescriptor *)Heap.AlignedAlloc(0x1000, sizeof(EHCITransferDescriptor) * MAX_TRANSFERS);
controller.AsyncQueueHead = AllocateEmptyQH(controller);
// Link to itself
controller.AsyncQueueHead[0].Head = (int)controller.AsyncQueueHead | FL_QUEUEHEAD;
controller.PeriodicQueuehead = AllocateEmptyQH(controller);
for (int i = 0; i < 1024; i++)
{
controller.FrameList[i] = FL_QUEUEHEAD | (int)controller.PeriodicQueuehead;
}
// Set device
*(int *)(controller.OperationalRegisters + REG_FRINDEX) = 0;
*(int *)(controller.OperationalRegisters + REG_PERIODICLISTBASE) = (int)Paging.GetPhysicalFromVirtual(controller.FrameList);
*(int *)(controller.OperationalRegisters + REG_ASYNCLISTADDR) = (int)Paging.GetPhysicalFromVirtual(controller.AsyncQueueHead);
*(int *)(controller.OperationalRegisters + REG_CTRLDSSEGMENT) = 0;
Console.Write("Periodic: ");
Console.WriteHex((int)Paging.GetPhysicalFromVirtual(controller.FrameList));
Console.WriteLine("");
Console.Write("Periodic: ");
Console.WriteHex((int)Paging.GetPhysicalFromVirtual(controller.FrameList));
Console.WriteLine("");
Console.Write("FRAME LIST PHYS: ");
Console.WriteHex((int)Paging.GetPhysicalFromVirtual(controller.FrameList));
Console.WriteLine("");
Console.Write("FRAME LIST ENTRY: ");
Console.WriteHex((int)controller.FrameList);
Console.WriteLine("");
Console.Write("FRAME LIST ENTRY 1: ");
Console.WriteHex(controller.FrameList[0]);
Console.WriteLine("");
// Reset status
*(int *)(controller.OperationalRegisters + REG_USBSTS) = 0x3F;
// enable device
*(int *)(controller.OperationalRegisters + REG_USBCMD) = USBCMD_PSE | USBCMD_RUN | USBCMD_ASPME | (ITC_8MICROFRAMES << USBCMD_ITC);
// Wait till done
while ((*(int *)(controller.OperationalRegisters + REG_USBSTS) & (1 << 12)) > 0)
{
CPU.HLT();
}
Console.Write("[EHCI] Detected with ");
Console.WriteHex(controller.PortNum);
Console.WriteLine(" ports");
probe(controller);
}
