public void EnterHBlank(Arm7Processor processor)
{
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat |= 1 << 1;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
// Advance the bgx registers
for (int bg = 0; bg <= 1; bg++)
{
short dmx = (short)Memory.ReadU16(this.memory.IORam, Memory.BG2PB + (uint)bg * 0x10);
short dmy = (short)Memory.ReadU16(this.memory.IORam, Memory.BG2PD + (uint)bg * 0x10);
this.memory.Bgx[bg] += dmx;
this.memory.Bgy[bg] += dmy;
}
if (this.curLine < 160)
{
this.memory.HBlankDma();
// Trigger hblank irq
if ((dispstat & (1 << 4)) != 0)
{
processor.RequestIrq(1);
}
}
}
public void EnterHBlank(Arm7Processor processor)
{
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat |= 1 << 1;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
// Advance the bgx registers
for (int bg = 0; bg <= 1; bg++)
{
short dmx = (short)Memory.ReadU16(this.memory.IORam, Memory.BG2PB + (uint)bg * 0x10);
short dmy = (short)Memory.ReadU16(this.memory.IORam, Memory.BG2PD + (uint)bg * 0x10);
this.memory.Bgx[bg] += dmx;
this.memory.Bgy[bg] += dmy;
}
if (this.curLine < 160)
{
this.memory.HBlankDma();
// Trigger hblank irq
if ((dispstat & (1 << 4)) != 0)
{
processor.RequestIrq(1);
}
}
}
private void LeaveVBlank(Arm7Processor processor)
{
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat &= 0xFFFE;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
processor.UpdateKeyState();
// Update the rot/scale values
this.memory.Bgx[0] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG2X_L);
this.memory.Bgx[1] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG3X_L);
this.memory.Bgy[0] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG2Y_L);
this.memory.Bgy[1] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG3Y_L);
}
private void LeaveVBlank(Arm7Processor processor)
{
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat &= 0xFFFE;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
processor.UpdateKeyState();
// Update the rot/scale values
this.memory.Bgx[0] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG2X_L);
this.memory.Bgx[1] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG3X_L);
this.memory.Bgy[0] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG2Y_L);
this.memory.Bgy[1] = (int)Memory.ReadU32(this.memory.IORam, Memory.BG3Y_L);
}
public ArmCore(Arm7Processor parent, Memory memory)
{
this.parent = parent;
this.memory = memory;
registers = this.parent.Registers;
NormalOps = new ExecuteInstruction[8]
{
DataProcessing,
DataProcessingImmed,
LoadStoreImmediate,
LoadStoreRegister,
LoadStoreMultiple,
Branch,
CoprocessorLoadStore,
SoftwareInterrupt
};
}
/// <summary>
///
/// </summary>
/// <param name="processor"></param>
/// <returns>true if end of frame</returns>
public bool LeaveHBlank(Arm7Processor processor)
{
bool ret = false;
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat &= 0xFFF9;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
// Move to the next line
this.curLine++;
if (this.curLine >= 228)
{
// Start again at the beginning
this.curLine = 0;
}
// Update registers
Memory.WriteU16(this.memory.IORam, Memory.VCOUNT, (ushort)this.curLine);
// Check for vblank
if (this.curLine == 160)
{
this.EnterVBlank(processor);
ret = true;
}
else if (this.curLine == 0)
{
this.LeaveVBlank(processor);
}
// Check y-line trigger
if (((dispstat >> 8) & 0xff) == this.curLine)
{
dispstat = (ushort)(Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT) | (1 << 2));
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
if ((dispstat & (1 << 5)) != 0)
{
processor.RequestIrq(2);
}
}
return(ret);
}
private void EnterVBlank(Arm7Processor processor)
{
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat |= 1;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
// Render the frame
this.gbaManager.FramesRendered++;
this.presenter(this.renderer.ShowFrame());
if ((dispstat & (1 << 3)) != 0)
{
// Fire the vblank irq
processor.RequestIrq(0);
}
// Check for DMA triggers
this.memory.VBlankDma();
}
public ThumbArmletTranslator(Arm7Processor parent, Memory memory)
{
this.parent = parent;
this.memory = memory;
registers = this.parent.Registers;
NormalOps = new ExecuteInstruction[256]
{
OpLslImm, OpLslImm, OpLslImm, OpLslImm, OpLslImm, OpLslImm, OpLslImm, OpLslImm,
OpLsrImm, OpLsrImm, OpLsrImm, OpLsrImm, OpLsrImm, OpLsrImm, OpLsrImm, OpLsrImm,
OpAsrImm, OpAsrImm, OpAsrImm, OpAsrImm, OpAsrImm, OpAsrImm, OpAsrImm, OpAsrImm,
OpAddRegReg, OpAddRegReg, OpSubRegReg, OpSubRegReg, OpAddRegImm, OpAddRegImm, OpSubRegImm, OpSubRegImm,
OpMovImm, OpMovImm, OpMovImm, OpMovImm, OpMovImm, OpMovImm, OpMovImm, OpMovImm,
OpCmpImm, OpCmpImm, OpCmpImm, OpCmpImm, OpCmpImm, OpCmpImm, OpCmpImm, OpCmpImm,
OpAddImm, OpAddImm, OpAddImm, OpAddImm, OpAddImm, OpAddImm, OpAddImm, OpAddImm,
OpSubImm, OpSubImm, OpSubImm, OpSubImm, OpSubImm, OpSubImm, OpSubImm, OpSubImm,
OpArith, OpArith, OpArith, OpArith, OpAddHi, OpCmpHi, OpMovHi, OpBx,
OpLdrPc, OpLdrPc, OpLdrPc, OpLdrPc, OpLdrPc, OpLdrPc, OpLdrPc, OpLdrPc,
OpStrReg, OpStrReg, OpStrhReg, OpStrhReg, OpStrbReg, OpStrbReg, OpLdrsbReg, OpLdrsbReg,
OpLdrReg, OpLdrReg, OpLdrhReg, OpLdrhReg, OpLdrbReg, OpLdrbReg, OpLdrshReg, OpLdrshReg,
OpStrImm, OpStrImm, OpStrImm, OpStrImm, OpStrImm, OpStrImm, OpStrImm, OpStrImm,
OpLdrImm, OpLdrImm, OpLdrImm, OpLdrImm, OpLdrImm, OpLdrImm, OpLdrImm, OpLdrImm,
OpStrbImm, OpStrbImm, OpStrbImm, OpStrbImm, OpStrbImm, OpStrbImm, OpStrbImm, OpStrbImm,
OpLdrbImm, OpLdrbImm, OpLdrbImm, OpLdrbImm, OpLdrbImm, OpLdrbImm, OpLdrbImm, OpLdrbImm,
OpStrhImm, OpStrhImm, OpStrhImm, OpStrhImm, OpStrhImm, OpStrhImm, OpStrhImm, OpStrhImm,
OpLdrhImm, OpLdrhImm, OpLdrhImm, OpLdrhImm, OpLdrhImm, OpLdrhImm, OpLdrhImm, OpLdrhImm,
OpStrSp, OpStrSp, OpStrSp, OpStrSp, OpStrSp, OpStrSp, OpStrSp, OpStrSp,
OpLdrSp, OpLdrSp, OpLdrSp, OpLdrSp, OpLdrSp, OpLdrSp, OpLdrSp, OpLdrSp,
OpAddPc, OpAddPc, OpAddPc, OpAddPc, OpAddPc, OpAddPc, OpAddPc, OpAddPc,
OpAddSp, OpAddSp, OpAddSp, OpAddSp, OpAddSp, OpAddSp, OpAddSp, OpAddSp,
OpSubSp, OpUnd, OpUnd, OpUnd, OpPush, OpPushLr, OpUnd, OpUnd,
OpUnd, OpUnd, OpUnd, OpUnd, OpPop, OpPopPc, OpUnd, OpUnd,
OpStmia, OpStmia, OpStmia, OpStmia, OpStmia, OpStmia, OpStmia, OpStmia,
OpLdmia, OpLdmia, OpLdmia, OpLdmia, OpLdmia, OpLdmia, OpLdmia, OpLdmia,
OpBCond, OpBCond, OpBCond, OpBCond, OpBCond, OpBCond, OpBCond, OpBCond,
OpBCond, OpBCond, OpBCond, OpBCond, OpBCond, OpBCond, OpUnd, OpSwi,
OpB, OpB, OpB, OpB, OpB, OpB, OpB, OpB,
OpUnd, OpUnd, OpUnd, OpUnd, OpUnd, OpUnd, OpUnd, OpUnd,
OpBl1, OpBl1, OpBl1, OpBl1, OpBl1, OpBl1, OpBl1, OpBl1,
OpBl2, OpBl2, OpBl2, OpBl2, OpBl2, OpBl2, OpBl2, OpBl2
};
}
private void EnterVBlank(Arm7Processor processor)
{
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat |= 1;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
// Render the frame
this.gbaManager.FramesRendered++;
this.presenter(this.renderer.ShowFrame());
if ((dispstat & (1 << 3)) != 0)
{
// Fire the vblank irq
processor.RequestIrq(0);
}
// Check for DMA triggers
this.memory.VBlankDma();
}
public ArmArmletTranslator(Arm7Processor parent, Memory memory)
{
_parent = parent;
_memory = memory;
_registers = _parent.Registers;
}
public void Update(Arm7Processor processor, Memory memory)
{
_memory = memory;
Invalidate();
}
/// <summary>
///
/// </summary>
/// <param name="processor"></param>
/// <returns>true if end of frame</returns>
public bool LeaveHBlank(Arm7Processor processor)
{
bool ret = false;
ushort dispstat = Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT);
dispstat &= 0xFFF9;
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
// Move to the next line
this.curLine++;
if (this.curLine >= 228)
{
// Start again at the beginning
this.curLine = 0;
}
// Update registers
Memory.WriteU16(this.memory.IORam, Memory.VCOUNT, (ushort)this.curLine);
// Check for vblank
if (this.curLine == 160)
{
this.EnterVBlank(processor);
ret = true;
}
else if (this.curLine == 0)
{
this.LeaveVBlank(processor);
}
// Check y-line trigger
if (((dispstat >> 8) & 0xff) == this.curLine)
{
dispstat = (ushort)(Memory.ReadU16(this.memory.IORam, Memory.DISPSTAT) | (1 << 2));
Memory.WriteU16(this.memory.IORam, Memory.DISPSTAT, dispstat);
if ((dispstat & (1 << 5)) != 0)
{
processor.RequestIrq(2);
}
}
return ret;
}
public void Update(Arm7Processor processor, Memory memory)
{
_memory = memory;
Refresh();
}