private void m_btnPlaceMacro_Click(object sender, EventArgs e)
{
if (!IsPlacementValidForSingleInstantiation(false))
{
return;
}
string libraryElementName = null;
Tile anchor = null;
string errorMessage = null;
string instanceName = null;
string netlistContainerName = null;
bool paramsValid = FindParametersForSingleInstantiation(out libraryElementName, out anchor, out instanceName, out netlistContainerName, out errorMessage);
if (!paramsValid)
{
MessageBox.Show(errorMessage, "Error", MessageBoxButtons.OK);
return;
}
AddSingleInstantiationByTile addInst = new AddSingleInstantiationByTile();
addInst.AutoClearModuleSlot = m_chkBoxAutoclearSingle.Checked;
addInst.AnchorLocation = anchor.Location;
addInst.InstanceName = instanceName;
addInst.LibraryElementName = libraryElementName;
addInst.NetlistContainerName = netlistContainerName;
Commands.CommandExecuter.Instance.Execute(addInst);
}
private List <Command> GetTunnelCommands(FPGATypes.InterfaceDirection direction, List <Command> placementCommands)
{
List <Command> result = new List <Command>();
// TODO make parameter?
foreach (Command placeCmd in placementCommands.Where(c => c is AddSingleInstantiationByTile))
{
AddSingleInstantiationByTile addCmd = (AddSingleInstantiationByTile)placeCmd;
Tile clb = FPGA.FPGA.Instance.GetTile(addCmd.AnchorLocation);
Tile interconnect = FPGATypes.GetInterconnectTile(clb);
ExcludePortsFromBlockingOnTileByRegexp exclude = new ExcludePortsFromBlockingOnTileByRegexp();
exclude.CheckForExistence = false;
exclude.IncludeAllPorts = false;
exclude.Location = interconnect.Location;
if (BuildTarget == Target.Static && direction == FPGATypes.InterfaceDirection.East)
{
exclude.PortNameRegexp = "(WW2E[0|1|2|3])|(EE2B[0|1|2|3])";
}
else if (BuildTarget == Target.Static && direction == FPGATypes.InterfaceDirection.West)
{
exclude.PortNameRegexp = "(EE2E[0|1|2|3])|(WW2B[0|1|2|3])";
}
else if (BuildTarget == Target.Module && direction == FPGATypes.InterfaceDirection.East)
{
exclude.PortNameRegexp = "(EE2E[0|1|2|3])|(WW2B[0|1|2|3])";
}
else if (BuildTarget == Target.Module && direction == FPGATypes.InterfaceDirection.West)
{
exclude.PortNameRegexp = "(WW2E[0|1|2|3])|(EE2B[0|1|2|3])";
}
else
{
throw new ArgumentException("Direction " + direction + " not implemented");
}
//exclude.PortNameRegexp = "((EE)|(WW))2(B|E)[0|1|2|3]"; // the epxression parser cant handle [0-3]
if (result.Count == 0)
{
exclude.Comment = " exclude tunnel wires from blocking";
}
result.Add(exclude);
}
return(result);
}
/// <summary>
///
/// </summary>
/// <param name="dir"></param>
/// <param name="connectionPrimitiveName"></param>
/// <param name="instance"></param>
/// <param name="columns"></param>
/// <param name="maxWiresPerRow"></param>
/// <param name="prefix">The prefix that can be sued for subsequent AnnotateSignal commands</param>
/// <returns></returns>
private List <Command> GetPlacementCommands(FPGA.FPGATypes.InterfaceDirection dir, string connectionPrimitiveName, string instance, int columns, int maxWiresPerRow)
{
LibraryElement libElement = Objects.Library.Instance.GetElement(connectionPrimitiveName);
List <Tile> tilesToReleaseWiresOn = null;
List <Tile> anchors = GetAnchors(dir, columns, false, out tilesToReleaseWiresOn);
Dictionary <int, List <Signal> > inputsPerColumn = new Dictionary <int, List <Signal> >();
Dictionary <int, List <Signal> > outputsPerColumn = new Dictionary <int, List <Signal> >();
//Console.WriteLine(dir);
//Console.WriteLine(instance);
for (int column = 0; column < columns; column++)
{
List <Signal> inputs = GetSignals(dir, column, "in");
List <Signal> outputs = GetSignals(dir, column, "out");
// equalize both list with open signals, the signal paramteres are dont care
while (inputs.Count % maxWiresPerRow != 0 || inputs.Count < outputs.Count)
{
inputs.Add(new Signal("open", "in", dir, IslandName, column));
}
while (outputs.Count < inputs.Count)
{
outputs.Add(new Signal("open", "out", dir, IslandName, column));
}
inputsPerColumn[column] = inputs;
outputsPerColumn[column] = outputs;
}
Dictionary <Tile, List <Signal> > inputsOnTile = new Dictionary <Tile, List <Signal> >();
Dictionary <Tile, List <Signal> > outputsOnTile = new Dictionary <Tile, List <Signal> >();
List <Tile> connectionPrimitiveCLBs = new List <Tile>();
// 1 collect inputs in this tile
// iterate row wise
for (int column = 0; column < columns; column++)
{
Tile currentAnchor = anchors[column];
for (int i = 0; i < inputsPerColumn[column].Count; i += maxWiresPerRow)
{
inputsOnTile.Add(currentAnchor, new List <Signal>());
outputsOnTile.Add(currentAnchor, new List <Signal>());
connectionPrimitiveCLBs.Add(currentAnchor);
for (int j = 0; j < maxWiresPerRow; j++)
{
Signal input = inputsPerColumn[column][i + j];
inputsOnTile[currentAnchor].Add(input);
Signal output = outputsPerColumn[column][i + j];
outputsOnTile[currentAnchor].Add(output);
}
currentAnchor = MoveAnchorToNextColumn(dir, currentAnchor);
}
}
CheckMacroTiles(dir, connectionPrimitiveCLBs);
string prefix = instance + connectionPrimitiveName;
// do connection primitive instantiation
List <Command> result = new List <Command>();
foreach (Tile anchor in connectionPrimitiveCLBs)
{
List <Signal> localInputs = inputsOnTile[anchor];
List <Signal> localOutputs = outputsOnTile[anchor];
// do we need to place a macro here
bool placeMacro = HasNonOpenSignal(localInputs) || HasNonOpenSignal(localOutputs);
if (!placeMacro)
{
continue;
}
// check that the added signal names are all identical
if (localOutputs.Select(s => s.SignalNameWithoutBraces).Distinct().Count() != 1)
{
throw new ArgumentException("Signal names may only change at a boundary of 4. Check signal " + localInputs[0]);
}
if (localInputs.Select(s => s.SignalNameWithoutBraces).Distinct().Count() != 1)
{
throw new ArgumentException("Signal names may only change at a boundary of 4. Check signal " + localOutputs[0]);
}
// can we use this tile for placement?
StringBuilder errorList = null;
bool validPlacement = DesignRuleChecker.CheckLibraryElementPlacement(anchor, libElement, out errorList);
if (!validPlacement)
{
throw new ArgumentException("Can not place the library element at the desired postion (check the output window)" + errorList.ToString());
}
// finally, place the macro
AddSingleInstantiationByTile addByTile = new AddSingleInstantiationByTile();
addByTile.AnchorLocation = anchor.Location;
addByTile.AutoClearModuleSlot = false;
addByTile.InstanceName = prefix + "_" + result.Count;
addByTile.LibraryElementName = connectionPrimitiveName;
if (result.Count == 0)
{
addByTile.Comment = "instantiate a connection primitive at tile " + addByTile.AnchorLocation + ". An expert may want to relocate the instantiations";
}
result.Add(addByTile);
AnnotateSignalNames annotateCmd = new AnnotateSignalNames();
annotateCmd.InstantiationFilter = "^" + addByTile.InstanceName;
string inputSource = BuildTarget == Target.Static ? "I:" : "O:";
string outputSource = BuildTarget == Target.Static ? "O:" : "I:";
annotateCmd.PortMapping.Add(inputSource + localInputs[0].SignalNameWithoutBraces + ":external");
annotateCmd.PortMapping.Add(outputSource + localOutputs[0].SignalNameWithoutBraces + ":external");
annotateCmd.PortMapping.Add("H:H:internal");
result.Add(annotateCmd);
}
return(result);
}
