private void MakeVectors(int value1, int width1, int value2, int width2,
out StdLogicVector r1, out StdLogicVector r2)
{
StdLogicVector v1 = StdLogicVector.FromLong(value1, width1);
StdLogicVector v2 = StdLogicVector.FromLong(value2, width2);
StdLogicVector v = v1.Concat(v2).Concat(StdLogicVector._0s(2 * MaxWidth - width1 - width2));
r1 = v[2 * MaxWidth - 1, MaxWidth];
r2 = v[MaxWidth - 1, 0];
}
private StdLogicVector CreateVector()
{
StdLogicVector[] r = new StdLogicVector[4];
r[0] = StdLogicVector._0s(MaxWidth);
r[1] = StdLogicVector._1s(MaxWidth);
r[2] = StdLogicVector.DCs(MaxWidth);
r[3] = StdLogicVector.Xs(MaxWidth);
return r[0].Concat(r[1].Concat(r[2].Concat(r[3])));
}
public override IEnumerable <TAVerb> DoNothing()
{
if (_wrEnI != null)
{
// Memory used as RAM
yield return(Verb(ETVMode.Locked,
_wrEnI.Stick(StdLogic._0),
_addrI.Stick(StdLogicVector.DCs(_addrBits)),
_dataInI.Stick(StdLogicVector.DCs(_dataBits))));
}
else
{
// Memory used as ROM
yield return(Verb(ETVMode.Locked,
_addrI.Stick(StdLogicVector.DCs(_addrBits))));
}
}
/// <summary>
/// Replaces any don't-care symbol with the high-impedance symbol.
/// </summary>
public void ReplaceDontCaresByTriStates()
{
var allGraphs = _graphs.Concat(Enumerable.Repeat(_neutral, 1));
foreach (FlowGraph g in allGraphs)
{
var pflow = g.ToFlow();
foreach (Flow flow in pflow.Flows)
{
if (IsDontCareFlow(flow))
{
var oflow = flow as ValueFlow;
var slv = (StdLogicVector)oflow.Value;
var zslv = StdLogicVector.Zs(slv.Size);
var nflow = new ValueFlow(zslv, flow.Target);
g.Add(nflow);
}
}
}
}
private async void StimulateAndTest()
{
for (int i = 0; i < 10; i++)
{
for (int j = 0; j < 10; j++)
{
_x.Next = StdLogicVector.FromInt(i, 32);
_y.Next = StdLogicVector.FromInt(j, 32);
while (_rdy.Cur != '0')
{
await _rdy;
}
while (_rdy.Cur != '1')
{
await _rdy;
}
Console.WriteLine("The GCD of " + i + " and " + j + " is " + _z.Cur.IntValue);
}
}
}
public override void Establish(IAutoBinder binder)
{
if (_realized)
{
return;
}
_inSignals = _argWidths.Select((w, i) =>
(SLVSignal)binder.GetSignal(EPortUsage.Default, "concat" + i, null,
StdLogicVector.Us(w))).ToArray();
int total = _argWidths.Sum();
_outSignal = (SLVSignal)binder.GetSignal(EPortUsage.Default, "concout", null, StdLogicVector.Us(total));
var pb = new ConcatProcessBuilder(this);
var alg = pb.GetAlgorithm();
alg.Name = "concatenize";
binder.CreateProcess(Process.EProcessKind.Triggered, alg, _inSignals.Select(s => s.Descriptor).ToArray());
_realized = true;
}
public override StdLogicVector[] SerializeInstance(object instance)
{
StdLogicVector plain = StdLogicVector.Serialize(instance);
StdLogicVector[] result = new StdLogicVector[Size];
for (int i = 0; i < (int)Size; i++)
{
int upper = (i + 1) * WordSize - 1;
if (upper >= plain.Size)
{
result[i] = StdLogicVector._0s(upper - plain.Size + 1).Concat(plain[plain.Size - 1, i * WordSize]);
}
else
{
result[i] = plain[(i + 1) * WordSize - 1, i *WordSize];
}
}
return(result);
}
private async void Computation()
{
await Tick;
while (true)
{
ProgramFlow.DoNotUnroll();
ProgramFlow.IOBarrier();
Rdy.Next = '0';
int x = X.Cur.IntValue;
int y = Y.Cur.IntValue;
int z;
if (x == 0)
{
z = y;
}
else
{
while (y != 0)
{
ProgramFlow.DoNotUnroll();
if (x > y)
{
x -= y;
}
else
{
y -= x;
}
}
z = x;
}
Z.Next = StdLogicVector.FromInt(z, 32);
await 63.Ticks();
ProgramFlow.IOBarrier();
Rdy.Next = '1';
ProgramFlow.IOBarrier();
await Tick;
}
}
public IEnumerable <TAVerb> LdelemFixA(ISignalSource <StdLogicVector> addr,
ISignalSink <StdLogicVector> data)
{
if (_wrEnI != null)
{
// Memory used as RAM
yield return(Verb(ETVMode.Locked,
_wrEnI.Stick(StdLogic._0),
_addrI.Drive(addr),
_dataInI.Stick(StdLogicVector._0s(_dataBits))));
}
else
{
// Memory used as ROM
yield return(Verb(ETVMode.Locked, _addrI.Drive(addr)));
}
yield return(Verb(ETVMode.Shared,
data.Comb.Connect(_dataOutI.AsSignalSource <StdLogicVector>())));
}
public IEnumerable <TAVerb> LdelemFixAFixI(ISignalSink <StdLogicVector> data, long[] indices)
{
if (_wrEnI != null)
{
// Memory used as RAM
yield return(Verb(ETVMode.Locked,
_wrEnI.Stick(StdLogic._0),
_addrI.Stick(StdLogicVector.FromULong((ulong)indices[0], _addrBits)),
_dataInI.Stick(StdLogicVector._0s(_dataBits))));
}
else
{
// Memory used as ROM
yield return(Verb(ETVMode.Locked,
_addrI.Stick(StdLogicVector.FromULong((ulong)indices[0], _addrBits))));
}
yield return(Verb(ETVMode.Shared,
data.Comb.Connect(_dataOutI.AsSignalSource <StdLogicVector>())));
}
/// <summary>
/// Returns a wire-level type for <paramref name="otype"/>.
/// </summary>
/// <exception cref="ArgumentNullException">If <paramref name="otype"/> is <c>null</c>.</exception>
/// <exception cref="ArgumentException">If <paramref name="otype"/> is incomplete or is not convertible to a wire-level type.</exception>
public TypeDescriptor GetWireType(TypeDescriptor otype)
{
Contract.Requires <ArgumentNullException>(otype != null, "otype");
Contract.Requires <ArgumentException>(otype.IsUnconstrained || otype.IsComplete, "Incomplete type");
TypeLoweringInfo tli;
if (_tiLookup.TryGetValue(otype.CILType, out tli))
{
if (!tli.HasWireType)
{
throw new ArgumentException("Not convertible to a wire type " + otype.Name);
}
return(tli.MakeWireType(otype));
}
else
{
MemoryLayout layout = Marshal.Layout(otype, HWMarshalInfo.Instance);
return(TypeDescriptor.GetTypeOf(StdLogicVector._0s((long)layout.SizeInBits)));
}
}
public Mod2TestDesign(int inIntWidth, int fracWidth, int outIntWidth)
{
_clk = new SLSignal();
_x = new SLVSignal(inIntWidth + fracWidth)
{
InitialValue = StdLogicVector._0s(inIntWidth + fracWidth)
};
_r = new SLVSignal(outIntWidth + fracWidth)
{
InitialValue = StdLogicVector._0s(outIntWidth + fracWidth)
};
_clkGen = new Clock(new Time(10.0, ETimeUnit.ns));
Bind(() => _clkGen.Clk = _clk);
_mod2 = new FixFPMod1(inIntWidth, fracWidth, outIntWidth)
{
X = _x,
R = _r
};
}
/// <summary>
/// Checks whether a given dataflow transfers the don't care literal to its destination.
/// </summary>
/// <param name="flow">a dataflow</param>
public static bool IsDontCareFlow(Flow flow)
{
ValueFlow vflow = flow as ValueFlow;
if (vflow == null)
{
return(false);
}
StdLogicVector?slvdata = vflow.Value as StdLogicVector?;
StdLogic? sldata = vflow.Value as StdLogic?;
if (slvdata.HasValue)
{
return(slvdata.Value.Equals(StdLogicVector.DCs(slvdata.Value.Size)));
}
if (sldata.HasValue)
{
return(sldata.Value.Equals(StdLogic.DC));
}
return(false);
}
/// <summary>
/// Constructs a new instance.
/// </summary>
/// <param name="mappedVariable">variable to be hardware-mapped</param>
/// <param name="directFeed"><c>true</c>, if write-trough semantics hold, i.e. input is combinatorially routed to output during write access</param>
public LocalStorageUnit(Variable mappedVariable, bool directFeed)
{
MappedVariable = mappedVariable;
_directFeed = directFeed;
DataWidth = (int)TypeLowering.Instance.GetWireType(mappedVariable.Type).Constraints[0].Size;
StdLogicVector initial;
if (mappedVariable.InitialValue == null)
{
initial = StdLogicVector._0s(TypeLowering.Instance.GetWireWidth(mappedVariable.Type));
}
else
{
initial = Marshal.SerializeForHW(mappedVariable.InitialValue);
}
_stg = new SLVSignal(DataWidth)
{
InitialValue = initial
};
_taSite = new LocalStorageUnitTransactionSite(this);
}
/// <summary>
/// Converts <paramref name="src"/> to <paramref name="dstType"/> datatype, possibly with loss of precision or overflow.
/// </summary>
/// <remarks>Currently, conversions between all primitive numeric CIL types, enum types, and System#-intrinsic datatypes
/// Signed, Unsigned, SFix, UFix and StdLogicVector are supported.</remarks>
/// <exception cref="ArgumentNullException">if <paramref name="dstType"/> is null</exception>
/// <exception cref="NotImplementedException">if there is no known conversion to <paramref name="dstType"/></exception>
public static object ConvertUFix(UFix src, TypeDescriptor dstType)
{
Contract.Requires <ArgumentNullException>(dstType != null, "dstType");
if (dstType.CILType.Equals(typeof(UFix)))
{
return(src.Resize(UFix.GetFormat(dstType).IntWidth, UFix.GetFormat(dstType).FracWidth));
}
else if (dstType.CILType.Equals(typeof(Unsigned)))
{
return(src.UnsignedValue.Resize(UFix.GetFormat(dstType).IntWidth));
}
else if (dstType.CILType.Equals(typeof(StdLogicVector)))
{
return(src.SLVValue[StdLogicVector.GetLength(dstType) - 1, 0]);
}
else
{
return(ConvertUFix(src, dstType.CILType));
}
}
private async void TestProcess()
{
await Tick;
int curNumber = 0x12345678;
do
{
_syncIn.Next = '1';
StdLogicVector next = StdLogicVector.FromLong(curNumber, Design.DataWidth);
_parIn.Next = next;
Console.WriteLine(DesignContext.Instance.CurTime + ": input number " + next.IntValue);
await Tick;
_syncIn.Next = '0';
while (!_syncOut.Cur)
{
await Tick;
}
Console.WriteLine(DesignContext.Instance.CurTime + ": output number " + _parOut.Cur.IntValue);
curNumber *= 2;
} while (true);
}
public override IEnumerable <TAVerb> DoNothing()
{
IProcess ctrl =
_host.DIVIDEND.Dual.Stick(StdLogicVector.DCs(_host.DividendAndQuotientWidth)).Par(
_host.DIVISOR.Dual.Stick(StdLogicVector.DCs(_host.DivisorWidth)));
if (_host.HasCE)
{
ctrl = ctrl.Par(_host.CE.Dual.Stick('1'));
}
if (_host.HasSCLR)
{
ctrl = ctrl.Par(_host.SCLR.Dual.Stick('0'));
}
if (_host.HasND)
{
ctrl = ctrl.Par(_host.ND.Dual.Stick('0'));
}
yield return(Verb(ETVMode.Locked, ctrl));
}
private StdLogicVector GetOffset()
{
switch (PhaseOffset)
{
case EPhaseOffset.Fixed:
return(poff1);
case EPhaseOffset.None:
return(StdLogicVector._0s(PhaseWidth));
case EPhaseOffset.programmable:
return(GetPhaseOffProgrammable());
case EPhaseOffset.Streaming:
return(POFF_IN.Cur);
default:
throw new NotImplementedException();
}
}
private void HandleLoadVar(XILSInstr xilsi)
{
var var = (Variable)xilsi.StaticOperand;
var mms = GetVariableLayout(var);
Unsigned addr = mms.BaseAddress;
var addrType = TypeDescriptor.GetTypeOf(addr);
int addrSize = addr.Size;
var rawWordType = Mapper.MarshalInfo.GetRawWordType();
var stackTypes = new TypeDescriptor[mms.Size + 1];
for (ulong k = 0; k < mms.Size; k++)
{
Emit(_iset.RdMemFix(Mapper.DefaultRegion, addr)
.CreateStk(RemapPreds(xilsi.Preds), 0, rawWordType));
addr = (addr + Unsigned.FromULong(1, 1)).Resize(addrSize);
stackTypes[k] = rawWordType;
}
uint concatSize = (uint)(mms.Size * Mapper.MarshalInfo.WordSize);
var concatType = TypeDescriptor.GetTypeOf(StdLogicVector._0s(concatSize));
if (mms.Size > 1)
{
stackTypes[mms.Size] = concatType;
Emit(_iset.Concat().CreateStk(stackTypes.Length, stackTypes));
}
var valueType = var.Type;
var slvValue = Marshal.SerializeForHW(valueType.GetSampleInstance());
var rawValueType = TypeDescriptor.GetTypeOf(slvValue);
if (!rawValueType.Equals(concatType))
{
Emit(_iset.Convert().CreateStk(1, concatType, rawValueType));
}
if (!rawValueType.Equals(valueType))
{
Emit(_iset.Convert().CreateStk(1, rawValueType, valueType));
}
}
private async void Computation()
{
await Tick;
while (true)
{
ProgramFlow.IOBarrier();
Rdy.Next = '0';
Sum.Next = StdLogicVector.FromInt(A.Cur.IntValue + B.Cur.IntValue, 32);
Diff.Next = StdLogicVector.FromInt(A.Cur.IntValue - B.Cur.IntValue, 32);
Prod.Next = StdLogicVector.FromInt(A.Cur.IntValue * B.Cur.IntValue, 32);
Quot.Next = StdLogicVector.FromInt(B.Cur.IntValue / A.Cur.IntValue, 32);
Neg.Next = StdLogicVector.FromInt(-A.Cur.IntValue, 32);
Abs.Next = StdLogicVector.FromInt(Math.Abs(A.Cur.IntValue), 32);
//await 9.Ticks();
await NTicks(9);
ProgramFlow.IOBarrier();
Rdy.Next = '1';
ProgramFlow.IOBarrier();
await Tick;
}
}
/// <summary>
/// Constructs a new instance.
/// </summary>
/// <param name="depth">depth of shift register (i.e. number of stages)</param>
/// <param name="width">bit-width of shift register</param>
/// <param name="useEn">whether to use shift enable input</param>
public RegPipe(int depth, int width, bool useEn = false)
{
Contract.Requires <ArgumentOutOfRangeException>(depth >= 0, "depth must be non-negative");
Contract.Requires <ArgumentOutOfRangeException>(width > 0, "width must be positive");
Contract.Requires <ArgumentOutOfRangeException>(depth > 0 || !useEn, "need at least 1 stage if using enable input.");
_width = width;
_depth = depth;
UseEn = useEn;
if (depth > 1)
{
int bits = width * depth;
_belowbit = bits - width - 1;
_stages = new SLVSignal(bits)
{
InitialValue = StdLogicVector._0s(bits)
};
}
else if (depth < 0)
{
throw new ArgumentException("Depth must be >= 0");
}
}
private async void StimulateAndTest()
{
for (int i = 1; i < 10; i++)
{
for (int j = 1; j < 10; j++)
{
_a.Next = StdLogicVector.FromInt(i, 32);
_b.Next = StdLogicVector.FromInt(j, 32);
do
{
await RisingEdge(_clk);
} while (_rdy.Cur != '0');
do
{
await RisingEdge(_clk);
} while (_rdy.Cur != '1');
Console.WriteLine(i + " + " + j + " = " + _sum.Cur.IntValue);
Console.WriteLine(i + " - " + j + " = " + _diff.Cur.IntValue);
Console.WriteLine(i + " * " + j + " = " + _prod.Cur.IntValue);
Console.WriteLine(i + " / " + j + " = " + _quot.Cur.IntValue);
}
}
}
private void ImplementLdConst(object value)
{
var mms = GetDataLayout(value);
Unsigned addr = mms.BaseAddress;
var addrType = TypeDescriptor.GetTypeOf(addr);
int addrSize = addr.Size;
var rawWordType = Mapper.MarshalInfo.GetRawWordType();
var stackTypes = new TypeDescriptor[mms.Size + 1];
for (ulong k = 0; k < mms.Size; k++)
{
Emit(_iset.RdMemFix(Mapper.DefaultRegion, addr).CreateStk(0, rawWordType));
addr = (addr + Unsigned.FromULong(1, 1)).Resize(addrSize);
stackTypes[k] = rawWordType;
}
uint concatSize = (uint)(mms.Size * Mapper.MarshalInfo.WordSize);
var concatType = TypeDescriptor.GetTypeOf(StdLogicVector._0s(concatSize));
if (mms.Size > 1)
{
stackTypes[mms.Size] = concatType;
Emit(_iset.Concat().CreateStk(stackTypes.Length, stackTypes));
}
var valueType = TypeDescriptor.GetTypeOf(value);
var slvValue = StdLogicVector.Serialize(value);
var rawValueType = TypeDescriptor.GetTypeOf(slvValue);
if (!rawValueType.Equals(concatType))
{
Emit(_iset.Convert().CreateStk(1, concatType, rawValueType));
}
if (!rawValueType.Equals(valueType))
{
Emit(_iset.Convert().CreateStk(1, rawValueType, valueType));
}
}
private void ReadProcess()
{
StdLogicVector result = StdLogicVector._0s(SLVDWidth);
for (int reg = 0; reg < NumRegs; reg++)
{
ProgramFlow.Unroll();
if (Bus2IP_RdCE.Cur[NumRegs - reg - 1] == '1')
{
for (int bit = 0; bit < SLVDWidth; bit++)
{
ProgramFlow.Unroll();
if (IsReadBitPresent(reg, bit))
{
result[bit] |= GetReadBit(reg, bit).Cur;
}
}
}
}
IP2Bus_Data.Next = result;
}
protected async void MasterWrite(StdLogicVector addr, StdLogicVector data)
{
ip2bus_mstrd_req.Next = '0';
ip2bus_mstwr_req.Next = '1';
ip2bus_mst_type.Next = '0';
ip2bus_mst_addr.Next = addr;
ip2bus_mst_be.Next = StdLogicVector._1s(NativeDataWidth / 8);
ip2bus_mst_length.Next = StdLogicVector._0s(LengthWidth);
ip2bus_mst_lock.Next = '0';
ip2bus_mst_reset.Next = '0';
ip2bus_mstwr_d.Next = data;
ip2bus_mstwr_rem.Next = StdLogicVector._0s(NativeDataWidth / 8);
ip2bus_mstwr_sof_n.Next = '0';
ip2bus_mstwr_eof_n.Next = '0';
ip2bus_mstwr_src_rdy_n.Next = '0';
ip2bus_mstwr_src_dsc_n.Next = '1';
do
{
await Tick;
} while (bus2ip_mst_cmdack.Cur != '1');
do
{
ip2bus_mstwr_req.Next = '0';
if (bus2ip_mstwr_dst_rdy_n.Cur == '0')
{
break;
}
await Tick;
} while (true);
ip2bus_mstwr_src_rdy_n.Next = '1';
ip2bus_mstwr_sof_n.Next = '1';
ip2bus_mstwr_eof_n.Next = '1';
await Tick;
ProgramFlow.IOBarrier();
}
public override IEnumerable <TAVerb> DoNothing()
{
yield return(Verb(ETVMode.Locked,
_host.Operand.Dual.Stick(StdLogicVector.DCs(_host.InputWidth))));
}
//********************************************************************************************************************
private StdLogicVector Getpipe( StdLogicVector x)
{
Dat_in.Next = x;
//Latency = y;
return Dat_outOff.Cur;
}
protected async void WriteBus(int reg, StdLogicVector be, StdLogicVector data)
{
_sig_Bus2IP_WrCE.Next = StdLogicVector.OneHot(user_logic.NumRegs, user_logic.NumRegs - reg - 1);
_sig_Bus2IP_BE.Next = be;
_sig_Bus2IP_Data.Next = data;
for (int t = 0; t < 100; t++)
{
await Tick;
if (_sig_IP2Bus_WrAck.Cur == '1' ||
_sig_IP2Bus_Error.Cur == '1')
break;
}
if (_sig_IP2Bus_Error.Cur == '1')
Console.WriteLine("Bus write error @reg " + reg);
if (_sig_IP2Bus_Error.Cur == '0' &&
_sig_IP2Bus_WrAck.Cur == '0')
Console.WriteLine("Timeout @reg " + reg);
_sig_Bus2IP_WrCE.Next = StdLogicVector._0s(user_logic.NumRegs);
_sig_Bus2IP_BE.Next = StdLogicVector._0s(user_logic.SLVDWidth / 8);
_sig_Bus2IP_Data.Next = StdLogicVector.Xs(user_logic.SLVDWidth);
}
public void InitialWrite(StdLogicVector addr, StdLogicVector data)
{
if (InitialImage == null)
{
InitialImage = new StdLogicVector[WriteDepthA];
for (int i = 0; i < WriteDepthA; i++)
InitialImage[i] = StdLogicVector.FromLong(RemainingMemoryLocations, (int)WriteWidthA);
}
ulong laddr = addr.ULongValue;
if (data.Size != WriteWidthA)
throw new ArgumentException("Wrong data size");
InitialImage[laddr] = data;
}
public void PreWrite(StdLogicVector addr, StdLogicVector data)
{
throw new NotImplementedException();
}
private IEnumerable<TAVerb> DoBinOp1(StdLogicVector op, ISignalSource<StdLogicVector> a, ISignalSource<StdLogicVector> b, ISignalSink<StdLogicVector> result)
{
if (_host.Arity != 2)
throw new InvalidOperationException();
IProcess pr = _host.A.Dual.Drive(a)
.Par(_host.B.Dual.Drive(b));
if ((_host.Function == EFunction.AddSubtract && _host.AddSubSel == EAddSub.Both) ||
(_host.Function == EFunction.Compare && _host.CompareSel == ECompareOp.Programmable))
pr = pr.Par(_host.Operation.Dual.Drive(SignalSource.Create(op)));
if (_host.HasOperationND)
pr = pr.Par(_host.OperationND.Dual.Drive(SignalSource.Create(StdLogic._1)));
if (_host.HasSCLR)
pr = pr.Par(_host.OperationND.Dual.Drive(SignalSource.Create(StdLogic._0)));
if (_host.HasCE)
pr = pr.Par(_host.OperationND.Dual.Drive(SignalSource.Create(StdLogic._1)));
var rpr = result.Comb.Connect(((SLVSignal)_host.Result)[0, 0].AsSignalSource());
if (_host.Latency == 0)
{
pr = pr.Par(rpr);
yield return Verb(ETVMode.Locked, pr);
}
else
{
for (int i = 0; i < _host.CyclesPerOperation; i++)
yield return Verb(ETVMode.Locked, pr);
for (int i = _host.CyclesPerOperation; i < _host.Latency; i++)
yield return Verb(ETVMode.Shared);
yield return Verb(ETVMode.Shared, rpr);
}
}
public async Task<StdLogicVector> Read(StdLogicVector addr)
{
AddrIn.Dual.Next = addr;
await RisingEdge(Clk);
return DataOut.Dual.Cur;
}
public override void Establish(IAutoBinder binder)
{
var divider = _host;
divider.CLK = binder.GetSignal <StdLogic>(EPortUsage.Clock, "Clk", null, '0');
divider.DIVIDEND = binder.GetSignal <StdLogicVector>(EPortUsage.Operand, "dividend", null, StdLogicVector._0s(divider.DividendAndQuotientWidth));
divider.DIVISOR = binder.GetSignal <StdLogicVector>(EPortUsage.Operand, "divisor", null, StdLogicVector._0s(divider.DivisorWidth));
divider.QUOTIENT = binder.GetSignal <StdLogicVector>(EPortUsage.Result, "quotient", null, StdLogicVector._0s(divider.DividendAndQuotientWidth));
if (divider.FractionWidth != 0)
{
divider.FRACTIONAL = binder.GetSignal <StdLogicVector>(EPortUsage.Operand, "fractional", null, StdLogicVector._0s(divider.FractionWidth));
}
divider.RDY = binder.GetSignal <StdLogic>(EPortUsage.Default, "rdy", null, '0');
divider.RFD = binder.GetSignal <StdLogic>(EPortUsage.Default, "rfd", null, '0');
divider.ND = binder.GetSignal <StdLogic>(EPortUsage.Default, "nd", null, '0');
}
public IEnumerable <TAVerb> DoNothing()
{
yield return(new TAVerb(this, ETVMode.Locked, () => { },
_host.X.Dual.Drive(SignalSource.Create(StdLogicVector.DCs(_host.XIntWidth + _host.XFracWidth)))));
}
public void Encode(int cstep, ParFlow pflow, ref StdLogicVector cw)
{
foreach (var flow in pflow.Flows)
{
if (FlowMatrix.IsDontCareFlow(flow))
continue;
var vflow = flow as ValueFlow;
if (vflow != null)
{
int offs = _vfc.GetValueWordOffset(flow.Target);
var ser = Marshal.SerializeForHW(vflow.Value);
cw[offs + ser.Size - 1, offs] = ser;
}
}
if (SelWidth <= 0)
return;
int symbol = _encFlow.EncodedSymbols[cstep];
if (symbol == 0)
symbol = 1;
uint index = (uint)(symbol - 1);
cw[SelOffset + SelWidth - 1, SelOffset] = StdLogicVector.FromUInt(index, SelWidth);
}
private void Encode(int cstep, ParFlow pflow, ref StdLogicVector cword)
{
foreach (var ms in _strings)
{
var projflow = new ParFlow();
foreach (var target in ms.Targets)
{
var flow = pflow.LookupTarget(target);
if (flow != null)
projflow.Add(flow);
}
ms.Encode(cstep, projflow, ref cword);
}
}
//********************************Hier wird das angegebene Binaere Vektor in Dezimal umgewandelt************************
private double Getradian(StdLogicVector x)
{
StdLogicVector phse = x; // N bits
long iphase = phse.SignedValue.LongValue;
double dphase = (double)iphase * Math.Pow(2.0, -(PhaseWidth - 1)) * Math.PI; // hier wird die Phase skaliert und damit kann Sinus berechnet werden
return dphase;
}
/// <summary>
/// Constructs a new instance
/// </summary>
/// <param name="host">hosting component</param>
/// <param name="constValue">constant value to load</param>
/// <param name="createSignal">true if a separate constant-valued signal should be created to provide the constant</param>
public ConstLoadingTransactionSite(Component host, StdLogicVector constValue, bool createSignal) :
base(host)
{
_constValue = constValue;
_createSignal = createSignal;
}
public object Deserialize(StdLogicVector slv, TypeDescriptor targetType)
{
var fmt = UFix.GetFormat(targetType);
return UFix.FromUnsigned(slv.UnsignedValue, fmt.FracWidth);
}
private void CreateSelSymbol(IAutoBinder binder, bool registered)
{
int count = NumSymbols;
if (count < 2)
return;
// This code will create a one-hot decoding
var selSymbols = new StdLogicVector[NumSymbols];
_selSymbols = selSymbols;
for (int i = 0; i < NumSymbols; i++)
{
StdLogicVector sym = StdLogicVector._0s(NumSymbols);
sym[i] = '1';
selSymbols[i] = sym;
}
var signal = binder.GetSignal(EPortUsage.Default, "MUXSymbol" + Order, null, selSymbols[0]);
_symbol = signal.Descriptor;
if (registered)
{
var dsignal = binder.GetSignal(EPortUsage.Default, "MUXReg" + Order, null, selSymbols[0]);
_symbold = dsignal.Descriptor;
}
}
/// <summary>
/// Constructs a new instance.
/// </summary>
/// <param name="floatWidth">total bit-width of input floating-point number
/// (actual partitioning between exponent and mantissa bits does not matter)</param>
/// <param name="outFormat">desired fixed-point output format</param>
public FloatSignAsSigned(int floatWidth, FixFormat outFormat)
{
FloatWidth = floatWidth;
OutFormat = outFormat;
_outM1 = SFix.FromDouble(-1.0, outFormat.IntWidth, outFormat.FracWidth).SLVValue;
_out0 = SFix.FromDouble(0.0, outFormat.IntWidth, outFormat.FracWidth).SLVValue;
_out1 = SFix.FromDouble(1.0, outFormat.IntWidth, outFormat.FracWidth).SLVValue;
_zeros = StdLogicVector._0s(floatWidth - 1);
TASite = new TransactionSite(this);
}
/// <summary>
/// Constructs a new instance.
/// </summary>
/// <param name="inIntWidth">operand integer bits</param>
/// <param name="fracWidth">operand and result fractional bits
/// (operand and result automatically have same number of fractional bits)</param>
/// <param name="outIntWidth">result integer bits</param>
public FixFPMod1(int inIntWidth, int fracWidth, int outIntWidth)
{
Contract.Requires(inIntWidth >= 2 && outIntWidth >= 2);
InIntWidth = inIntWidth;
OutIntWidth = outIntWidth;
FracWidth = fracWidth;
_zeroes = StdLogicVector._0s(FracWidth);
_padZeroes = StdLogicVector._0s(OutIntWidth - 1);
_padOnes = StdLogicVector._1s(OutIntWidth - 1);
TASite = new FPMod1TransactionSite(this);
}
public void PreWrite(StdLogicVector addr, StdLogicVector data)
{
Contract.Requires<ArgumentOutOfRangeException>(addr.ULongValue < Depth, "addr beyond ROM capacity");
Contract.Requires<ArgumentException>(data.Size == Width, "wrong data word size");
}
/// <summary>
/// Pre-initializes the RAM with word <paramref name="data"/> at address <paramref name="addr"/>.
/// Called during elaboration, never at model runtime.
/// </summary>
public void PreWrite(StdLogicVector addr, StdLogicVector data)
{
Contract.Requires<ArgumentOutOfRangeException>(addr.Size == AddrWidth, "invalid address width");
Contract.Requires<ArgumentOutOfRangeException>(addr.ULongValue < Depth, "address beyond RAM capacity");
Contract.Requires<ArgumentOutOfRangeException>(data.Size == Width, "invalid data width");
_content[addr.ULongValue] = data;
}
/// <summary>
/// Constructs a new instance.
/// </summary>
/// <param name="inputWidth">bit-width of operand</param>
/// <param name="hiOffset">high slice offset</param>
/// <param name="loOffset">low slice offset</param>
/// <param name="signed">whether operand is signed</param>
public Slicer(int inputWidth, int hiOffset, int loOffset, bool signed)
{
Contract.Requires<ArgumentOutOfRangeException>(hiOffset - loOffset >= -1);
InputWidth = inputWidth;
HiOffset = hiOffset;
LoOffset = loOffset;
IsSigned = signed;
TASite = new SlicerTransactionSite(this);
int msb = signed ? inputWidth - 2 : inputWidth - 1;
int hiPadWidth = Math.Max(hiOffset, msb) - Math.Max(loOffset, msb + 1) + 1;
int loPadWidth = Math.Min(hiOffset, -1) - Math.Min(loOffset, 0) + 1;
_hiSlice = Math.Min(msb, hiOffset);
_loSlice = Math.Max(0, loOffset);
if (_loSlice > _hiSlice)
{
// degenerate case: actually no portion of input word is used
_hiSlice = -1;
_loSlice = 0;
}
_hiPad0 = StdLogicVector._0s(hiPadWidth);
_hiPad1 = StdLogicVector._1s(hiPadWidth);
_loPad = StdLogicVector._0s(loPadWidth);
Debug.Assert(hiPadWidth + loPadWidth + _hiSlice - _loSlice == hiOffset - loOffset);
}
protected async void MasterWrite(StdLogicVector addr, StdLogicVector data)
{
ip2bus_mstrd_req.Next = '0';
ip2bus_mstwr_req.Next = '1';
ip2bus_mst_type.Next = '0';
ip2bus_mst_addr.Next = addr;
ip2bus_mst_be.Next = StdLogicVector._1s(NativeDataWidth / 8);
ip2bus_mst_length.Next = StdLogicVector._0s(LengthWidth);
ip2bus_mst_lock.Next = '0';
ip2bus_mst_reset.Next = '0';
ip2bus_mstwr_d.Next = data;
ip2bus_mstwr_rem.Next = StdLogicVector._0s(NativeDataWidth / 8);
ip2bus_mstwr_sof_n.Next = '0';
ip2bus_mstwr_eof_n.Next = '0';
ip2bus_mstwr_src_rdy_n.Next = '0';
ip2bus_mstwr_src_dsc_n.Next = '1';
do
{
await Tick;
} while (bus2ip_mst_cmdack.Cur != '1');
do
{
ip2bus_mstwr_req.Next = '0';
if (bus2ip_mstwr_dst_rdy_n.Cur == '0')
break;
await Tick;
} while (true);
ip2bus_mstwr_src_rdy_n.Next = '1';
ip2bus_mstwr_sof_n.Next = '1';
ip2bus_mstwr_eof_n.Next = '1';
await Tick;
ProgramFlow.IOBarrier();
}
//********************************************************************************************************************
private StdLogicVector Getpipe(StdLogicVector x)
{
Dat_in.Next = x;
//Latency = y;
return(Dat_outOff.Cur);
}
public async void Write(StdLogicVector addr, StdLogicVector data)
{
AddrIn.Dual.Next = addr;
DataIn.Dual.Next = data;
await RisingEdge(Clk);
}
protected async Task<StdLogicVector> MasterRead(StdLogicVector addr)
{
ip2bus_mstrd_req.Next = '1';
ip2bus_mstwr_req.Next = '0';
ip2bus_mst_type.Next = '0';
ip2bus_mst_addr.Next = addr;
ip2bus_mst_be.Next = StdLogicVector._1s(NativeDataWidth / 8);
ip2bus_mst_length.Next = StdLogicVector._0s(LengthWidth);
ip2bus_mst_lock.Next = '0';
ip2bus_mst_reset.Next = '0';
ip2bus_mstrd_dst_rdy_n.Next = '0';
ip2bus_mstrd_dst_dsc_n.Next = '1';
do
{
await Tick;
} while (bus2ip_mst_cmdack.Cur != '1');
ip2bus_mstrd_req.Next = '0';
do
{
await Tick;
} while (bus2ip_mst_cmplt.Cur != '1');
ip2bus_mstrd_dst_rdy_n.Next = '1';
return bus2ip_mstrd_d.Cur;
}
private void Processing()
{
if (CLK.RisingEdge())
{
phase = phase + GetPinc();
phase2 = phase2 + GetOffset();// hier ist das Problem, die Getpinc() incrementiert sich nicht nur die Getoffset()
phase4 = phase + phase2;
//phase5 = Getpipe(phase4);
//phase6 = GetPhaseIn();
}
switch (Partspresent)
{
case EConfigurationOptions.PhaseGeneratorAndSinCosLut:
{
PHASE_OUT.Next = phase4;
SINE.Next = GetSinus(Getradian(phase4));
COSINE.Next = GetCosinus(Getradian(phase4));
} break;
case EConfigurationOptions.PhaseGeneratorOnly:
{
PHASE_OUT.Next = phase2;
} break;
case EConfigurationOptions.SinAndCosOnly:
{
PHASE_OUT.Next = Getpipe(GetPhaseIn());
SINE.Next = GetSinus(Getradian(Getpipe(GetPhaseIn())));
COSINE.Next = GetCosinus(Getradian(Getpipe(GetPhaseIn())));
//PHASE_OUT1 = GetPhaseIn();
} break;
}
}
public override IEnumerable <TAVerb> DoNothing()
{
var inps = _inSignals.Select(s => s.Stick(StdLogicVector.DCs(s.InitialValue.Size)));
yield return(Verb(ETVMode.Locked, inps.ToArray()));
}
public void PreWrite(StdLogicVector addr, StdLogicVector data)
{
_content[addr.ULongValue] = data;
}
public override void Establish(IAutoBinder binder)
{
if (_established)
{
return;
}
if (_host.Latency > 0)
{
_host.Clk = (SLSignal)binder.GetSignal(EPortUsage.Clock, null, null, null);
}
_host.Operand = (SLVSignal)binder.GetSignal(EPortUsage.Operand, "Operand", null, StdLogicVector._0s(_host.InputWidth));
_host.Result = (SLVSignal)binder.GetSignal(EPortUsage.Result, "Result", null, StdLogicVector._0s(_host.OutputWidth));
_established = true;
}
public object Deserialize(StdLogicVector slv, TypeDescriptor targetType)
{
return slv.SignedValue;
}
public override StdLogicVector[] SerializeInstance(object instance)
{
StdLogicVector plain = StdLogicVector.Serialize(instance);
StdLogicVector[] result = new StdLogicVector[Size];
for (int i = 0; i < (int)Size; i++)
{
int upper = (i + 1) * WordSize - 1;
if (upper >= plain.Size)
{
result[i] = StdLogicVector._0s(upper - plain.Size + 1).Concat(plain[plain.Size - 1, i * WordSize]);
}
else
{
result[i] = plain[(i + 1) * WordSize - 1, i * WordSize];
}
}
return result;
}
private bool TryGetConstSLV(XILInstr instr, TypeDescriptor rtype, out StdLogicVector constSLV)
{
switch (instr.Name)
{
case InstructionCodes.LdConst:
{
object constValue = instr.Operand;
constSLV = StdLogicVector.Serialize(constValue);
}
break;
case InstructionCodes.Ld0:
{
object sample = rtype.GetSampleInstance();
StdLogicVector slv = StdLogicVector.Serialize(sample);
constSLV = StdLogicVector._0s(slv.Size);
}
break;
default:
{
constSLV = "";
return false;
}
}
return true;
}
public void Establish(IAutoBinder binder)
{
if (_established)
{
return;
}
var unit = _host;
unit.Clk = binder.GetSignal <StdLogic>(EPortUsage.Clock, "Clk", null, StdLogic._0);
unit.X = binder.GetSignal <StdLogicVector>(EPortUsage.Operand, "X", null, StdLogicVector._0s(unit.XIntWidth + unit.XFracWidth));
unit.Sin = binder.GetSignal <StdLogicVector>(EPortUsage.Result, "SinOut", null, StdLogicVector._0s(unit.YIntWidth + unit.YFracWidth));
unit.Cos = binder.GetSignal <StdLogicVector>(EPortUsage.Result, "CosOut", null, StdLogicVector._0s(unit.YIntWidth + unit.YFracWidth));
_established = true;
}
public override StdLogicVector[] SerializeInstance(object instance)
{
Contract.Assert(instance.GetType().Equals(LayoutedType.CILType));
var values = LayoutedType.CILType.GetEnumValues();
int index = Array.IndexOf(values, instance);
int wsize = (int)_wordSize;
int alignedNum = (NumBits + wsize - 1) / wsize * wsize;
StdLogicVector vec = StdLogicVector.FromInt(index, alignedNum);
StdLogicVector[] result = new StdLogicVector[Size];
for (int i = 0; i < (int)Size; i++)
{
result[i] = vec[i + wsize - 1, i];
}
return result;
}
public override StdLogicVector[] SerializeInstance(object instance)
{
StdLogicVector[] result = new StdLogicVector[Size];
foreach (var kvp in _locations)
{
StdLogicVector[] fieldData =
kvp.Value.FieldLayout.SerializeInstance(
kvp.Key.GetValue(instance));
Array.Copy(fieldData, 0, result, (int)kvp.Value.Offset, fieldData.Length);
}
return result;
}
public void PreWrite(StdLogicVector addr, StdLogicVector data)
{
_mem.InitialWrite(addr, data);
}
