protected ArrayAccess PushToHWStackAccess() { var stkptr = binder.EnsureRegister(arch.StackRegister); var slot = m.ARef(PrimitiveType.Ptr32, PICRegisters.GlobalStack, stkptr); m.Assign(stkptr, m.IAdd(stkptr, Constant.Byte(1))); return(slot); }
private Expression RewriteOp(MachineOperand op, bool maybe0 = false) { switch (op) { case RegisterOperand regOp: if (maybe0) { if (regOp.Register == Registers.GpRegs32[31]) { return(m.Word32(0)); } if (regOp.Register == Registers.GpRegs64[31]) { return(m.Word64(0)); } } return(binder.EnsureRegister(regOp.Register)); case ImmediateOperand immOp: return(immOp.Value); case AddressOperand addrOp: return(addrOp.Address); case VectorRegisterOperand vectorOp: Identifier vreg; if (vectorOp.Width.BitSize == 64) { vreg = binder.EnsureRegister(Registers.SimdRegs64[vectorOp.VectorRegister.Number - 32]); } else { vreg = binder.EnsureRegister(Registers.SimdRegs128[vectorOp.VectorRegister.Number - 32]); } if (vectorOp.Index >= 0) { // Treat the entire contents of the register as an array. //$BUG Indexing is done little-endian on the CPU, but must be // converted to big-endian to conform with the semantics of of Reko's ArrayAccess. var eType = PrimitiveType.CreateWord(Bitsize(vectorOp.ElementType)); int index = vectorOp.Index; return(m.ARef(eType, vreg, Constant.Int32(index))); } else { return(vreg); } case MemoryOperand mem: var ea = binder.EnsureRegister(mem.Base !); return(m.Mem(mem.Width, ea)); } throw new NotImplementedException($"Rewriting {op.GetType().Name} not implemented yet."); }
private Expression RewriteOp(MachineOperand op, bool maybe0 = false) { switch (op) { case RegisterOperand regOp: if (maybe0) { if (regOp.Register == Registers.GpRegs32[31]) { return(m.Word32(0)); } if (regOp.Register == Registers.GpRegs64[31]) { return(m.Word64(0)); } } return(binder.EnsureRegister(regOp.Register)); case ImmediateOperand immOp: return(immOp.Value); case AddressOperand addrOp: return(addrOp.Address); case VectorRegisterOperand vectorOp: Identifier vreg; if (vectorOp.Width.BitSize == 64) { vreg = binder.EnsureRegister(Registers.SimdRegs64[vectorOp.VectorRegister.Number - 32]); } else { vreg = binder.EnsureRegister(Registers.SimdRegs128[vectorOp.VectorRegister.Number - 32]); } if (vectorOp.Index >= 0) { var eType = PrimitiveType.CreateWord(Bitsize(vectorOp.ElementType)); return(m.ARef(eType, vreg, Constant.Int32(vectorOp.Index))); } else { return(vreg); } case MemoryOperand mem: var ea = binder.EnsureRegister(mem.Base); return(m.Mem(mem.Width, ea)); } throw new NotImplementedException($"Rewriting {op.GetType().Name} not implemented yet."); }
private void RewriteMov() { var src1 = Op(1); var dst = Op(0); if (instrCur.Operands.Length == 2) { m.Assign(dst, src1); } else { var src2 = Op(2); m.Assign(dst, m.ARef(PrimitiveType.Word64, src1, src2)); } }