/// <summary> /// Initialize /// </summary> public static unsafe void Init() { mMutex = new Mutex(); /** * Note: this cycles through PCI devices! */ for (int i = 0; i < Pci.DeviceNum; i++) { PciDevice dev = Pci.Devices[i]; if (dev.CombinedClass == (int)PciClassCombinations.USBController && dev.ProgIntf == INTF_UHCI) { initDevice(dev); } } }
/// <summary> /// Initializes ATA /// </summary> public static unsafe void Init() { PciDevice pciDev = findIDEDevice(); if (pciDev == null) { Console.WriteLine("[ATA] No ATA devices found"); return; } ATA_PRIMARY_IO = (ushort)((pciDev.BAR0.Address == 0x00 || pciDev.BAR0.Address == 0x01) ? 0x1F0 : pciDev.BAR0.Address); ATA_SECONDARY_IO = (ushort)((pciDev.BAR2.Address == 0x00 || pciDev.BAR2.Address == 0x01) ? 0x170 : pciDev.BAR2.Address); Devices = new IDE_Device[4]; probe(); // TODO: disk 2 says it exists but it not, this will cause a hang for (int i = 0; i < 1; i++) { if (!Devices[i].Exists) { continue; } char *name = (char *)Heap.Alloc(5); name[0] = 'H'; name[1] = 'D'; name[2] = 'I'; name[3] = (char)('0' + i); name[4] = '\0'; string nameStr = Util.CharPtrToString(name); Node node = new Node(); node.Read = readImpl; node.Write = writeImpl; IDCookie cookie = new IDCookie(i); node.Cookie = cookie; Disk.InitalizeNode(node, nameStr); RootPoint dev = new RootPoint(nameStr, node); VFS.MountPointDevFS.AddEntry(dev); } }
/// <summary> /// Load devices /// </summary> public static unsafe void LoadDevices() { for (int i = 0; i < Pci.DeviceNum; i++) { PciDevice dev = Pci.Devices[i]; string name = GenerateNodeName(dev.Bus, dev.Slot, dev.Function); Node node = new Node(); node.Size = (uint)sizeof(PciFSInfo); node.Read = readImpl; node.Flags = NodeFlags.FILE | NodeFlags.DEVICE; node.Cookie = new PciDeviceCookie(dev); RootPoint point = new RootPoint(name, node); m_container.AddEntry(point); } }
/// <summary> /// Initalize "Driver" /// </summary> public static void Init() { mID = 0; /** * Note: this cycles through PCI devices! */ for (int i = 0; i < Pci.DeviceNum; i++) { PciDevice dev = Pci.Devices[i]; if (dev.CombinedClass == 0x0106 && dev.ProgIntf == 0x01) { AHCI ahci = new AHCI(dev); ahci.InitDevice(); } } }
/// <summary> /// Readout bus for NVMe devices /// </summary> public static unsafe void Init() { mID = 0; /** * Note: this cycles through PCI devices! */ for (int i = 0; i < Pci.DeviceNum; i++) { PciDevice dev = Pci.Devices[i]; if (dev.CombinedClass == 0x0108 && dev.ProgIntf == 0x02) { NVMe nvme = new NVMe(dev); nvme.InitDevice(); } } }
public AHCI(PciDevice dev) { Read = false; mPciDevice = dev; }
/// <summary> /// Called when the exit is called on the PCI /// </summary> /// <param name="dev">Reference to the device</param> private static void exitHander(PciDevice dev) { }
public NVMe(PciDevice device) { mDevice = device; }
/// <summary> /// Initialization handler /// </summary> /// <param name="dev">This PCI device</param> private static unsafe void initHandler(PciDevice dev) { m_io_base = (ushort)(dev.BAR0.Address); /** * Check if I/O bar */ if ((dev.BAR0.flags & Pci.BAR_IO) == 0) { Console.WriteLine("[RTL8139] RTL8139 should be an I/O bar, not a memory bar!"); return; } /** * Set interrupt */ Pci.SetInterruptHandler(dev, handler); /** * Enable bus mastering */ Pci.EnableBusMastering(dev); /** * Enable device */ PortIO.Out8((ushort)(m_io_base + REG_CONF1), 0); /** * Do a software reset */ softwareReset(); /** * Initalize and allocate buffers */ initializeBuffers(); /** * Setup interrupts */ setInterruptMask(IMR_TOK | IMR_TER | IMR_ROK | IMR_RER); /** * Initalize transmit */ txInit(); /** * Initalize receive */ rxInit(); /** * Read mac address */ readMac(); /** * Update link status */ updateLinkStatus(); /** * Enable receiving and transmitting! */ PortIO.Out8((ushort)(m_io_base + REG_CMD), CMD_TE | CMD_RE); Console.WriteLine("[RTL8139] Initialized"); /** * Register device as the main network device */ Network.NetDevice netDev = new Network.NetDevice(); netDev.ID = dev.Device; netDev.Transmit = Transmit; netDev.GetMac = GetMac; Network.Set(netDev); }
private static void initDevice(PciDevice dev) { if ((dev.BAR4.flags & Pci.BAR_IO) == 0) { Console.WriteLine("[UHCI] Only Portio supported"); } Pci.EnableBusMastering(dev); UHCIController uhciDev = new UHCIController(); uhciDev.IOBase = (ushort)dev.BAR4.Address; uhciDev.Poll = Poll; Console.Write("[UHCI] Initalize at 0x"); Console.WriteHex(uhciDev.IOBase); Console.WriteLine(""); uhciDev.FrameList = (int *)Heap.AlignedAlloc(0x1000, sizeof(int) * 1024); uhciDev.QueueHeadPool = (UHCIQueueHead *)Heap.AlignedAlloc(0x1000, sizeof(UHCIQueueHead) * MAX_HEADS); uhciDev.TransmitPool = (UHCITransmitDescriptor *)Heap.AlignedAlloc(0x1000, sizeof(UHCITransmitDescriptor) * MAX_TRANSMIT); Memory.Memclear(uhciDev.QueueHeadPool, sizeof(UHCIQueueHead) * MAX_HEADS); Memory.Memclear(uhciDev.TransmitPool, sizeof(UHCITransmitDescriptor) * MAX_TRANSMIT); UHCIQueueHead *head = GetQueueHead(uhciDev); head->Head = TD_POINTER_TERMINATE; head->Element = TD_POINTER_TERMINATE; uhciDev.FirstHead = head; for (int i = 0; i < 1024; i++) { uhciDev.FrameList[i] = TD_POINTER_QH | (int)Paging.GetPhysicalFromVirtual(head); } PortIO.Out16((ushort)(uhciDev.IOBase + REG_LEGSUP), 0x8f00); /** * Initalize framelist */ PortIO.Out16((ushort)(uhciDev.IOBase + REG_FRNUM), 0); PortIO.Out32((ushort)(uhciDev.IOBase + REG_FRBASEADD), (uint)Paging.GetPhysicalFromVirtual(uhciDev.FrameList)); PortIO.Out8(((ushort)(uhciDev.IOBase + REG_SOFMOD)), 0x40); // Ensure default value of 64 (aka cycle time of 12000) /** * We are going to poll! */ PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBINTR), 0x00); /** * Clear any pending statusses */ PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBSTS), 0xFFFF); /** * Enable device */ PortIO.Out16((ushort)(uhciDev.IOBase + REG_USBCMD), USBCMD_RS); probe(uhciDev); Sharpen.USB.USB.RegisterController(uhciDev); }
/// <summary> /// The initialization handler /// </summary> /// <param name="dev">This PCI device</param> private static void initHandler(PciDevice dev) { }
private unsafe static void initDevice(PciDevice dev) { if ((dev.BAR0.flags & Pci.BAR_IO) != 0) { Console.WriteLine("[EHCI] Only Memory mapped IO supported"); } /** * Enable bus mastering */ Pci.EnableBusMastering(dev); ulong barAddress = dev.BAR0.Address; EHCIController controller = new EHCIController(); controller.MemoryBase = (int)Paging.MapToVirtual(Paging.KernelDirectory, (int)barAddress, 20 * 0x1000, Paging.PageFlags.Writable | Paging.PageFlags.Present); controller.FrameList = (int *)Heap.AlignedAlloc(0x1000, sizeof(int) * 1024); controller.CapabilitiesRegisters = (EHCIHostCapRegister *)(controller.MemoryBase); controller.OperationalRegisters = controller.MemoryBase + (*controller.CapabilitiesRegisters).CapLength; controller.PortNum = ReadPorts(controller); controller.QueueHeadPool = (EHCIQueueHead *)Heap.AlignedAlloc(0x1000, sizeof(EHCIQueueHead) * MAX_HEADS); controller.TransferPool = (EHCITransferDescriptor *)Heap.AlignedAlloc(0x1000, sizeof(EHCITransferDescriptor) * MAX_TRANSFERS); controller.AsyncQueueHead = AllocateEmptyQH(controller); // Link to itself controller.AsyncQueueHead[0].Head = (int)controller.AsyncQueueHead | FL_QUEUEHEAD; controller.PeriodicQueuehead = AllocateEmptyQH(controller); for (int i = 0; i < 1024; i++) { controller.FrameList[i] = FL_QUEUEHEAD | (int)controller.PeriodicQueuehead; } // Set device *(int *)(controller.OperationalRegisters + REG_FRINDEX) = 0; *(int *)(controller.OperationalRegisters + REG_PERIODICLISTBASE) = (int)Paging.GetPhysicalFromVirtual(controller.FrameList); *(int *)(controller.OperationalRegisters + REG_ASYNCLISTADDR) = (int)Paging.GetPhysicalFromVirtual(controller.AsyncQueueHead); *(int *)(controller.OperationalRegisters + REG_CTRLDSSEGMENT) = 0; Console.Write("Periodic: "); Console.WriteHex((int)Paging.GetPhysicalFromVirtual(controller.FrameList)); Console.WriteLine(""); Console.Write("Periodic: "); Console.WriteHex((int)Paging.GetPhysicalFromVirtual(controller.FrameList)); Console.WriteLine(""); Console.Write("FRAME LIST PHYS: "); Console.WriteHex((int)Paging.GetPhysicalFromVirtual(controller.FrameList)); Console.WriteLine(""); Console.Write("FRAME LIST ENTRY: "); Console.WriteHex((int)controller.FrameList); Console.WriteLine(""); Console.Write("FRAME LIST ENTRY 1: "); Console.WriteHex(controller.FrameList[0]); Console.WriteLine(""); // Reset status *(int *)(controller.OperationalRegisters + REG_USBSTS) = 0x3F; // enable device *(int *)(controller.OperationalRegisters + REG_USBCMD) = USBCMD_PSE | USBCMD_RUN | USBCMD_ASPME | (ITC_8MICROFRAMES << USBCMD_ITC); // Wait till done while ((*(int *)(controller.OperationalRegisters + REG_USBSTS) & (1 << 12)) > 0) { CPU.HLT(); } Console.Write("[EHCI] Detected with "); Console.WriteHex(controller.PortNum); Console.WriteLine(" ports"); probe(controller); }
/// <summary> /// Creates a new PciDeviceCookie /// </summary> /// <param name="dev">The device</param> public PciDeviceCookie(PciDevice dev) { Device = dev; }
public void setCard(PciDevice card) { cardInSlot = card; }