private void Inst_Addi(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { try { MipsState.WriteGPR32Signed(inst.Rt, MipsState.ReadGPR32Signed(inst.Rs) + (Int32)(Int16)inst.Immediate); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } else { try { MipsState.WriteGPRSigned(inst.Rt, MipsState.ReadGPRSigned(inst.Rs) + (Int64)(Int16)inst.Immediate); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } }
private void Inst_Add(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { try { MipsState.WriteGPR32Signed(inst.Rd, MipsState.ReadGPR32Signed(inst.Rs) + MipsState.ReadGPR32Signed(inst.Rt)); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } else { if (MipsState.ReadGPRUnsigned(inst.Rs).IsSigned32() && MipsState.ReadGPRUnsigned(inst.Rt).IsSigned32()) { try { MipsState.WriteGPRSigned(inst.Rd, MipsState.ReadGPRSigned(inst.Rs) + MipsState.ReadGPRSigned(inst.Rt)); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } } }
private void Inst_Slt(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { if (MipsState.ReadGPR32Signed(inst.Rs) < MipsState.ReadGPR32Signed(inst.Rt)) { MipsState.GPRRegs[inst.Rd] = 1; } else { MipsState.GPRRegs[inst.Rd] = 0; } } else { if (MipsState.ReadGPRSigned(inst.Rs) < MipsState.ReadGPRSigned(inst.Rt)) { MipsState.GPRRegs[inst.Rd] = 1; } else { MipsState.GPRRegs[inst.Rd] = 0; } } }
private void Inst_Xori(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { MipsState.WriteGPR32Signed(inst.Rt, MipsState.ReadGPR32Signed(inst.Rs) ^ (Int32)(Int16)inst.Immediate); } else { MipsState.WriteGPRSigned(inst.Rt, MipsState.ReadGPRSigned(inst.Rs) ^ (Int64)(Int16)inst.Immediate); } }
private void Inst_Bgez(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { DoBranch(MipsState.ReadGPR32Signed(inst.Rs) >= 0, inst); } else { DoBranch(MipsState.ReadGPRSigned(inst.Rs) >= 0, inst); } }
private void Inst_Dsrav(MipsInstruction inst) { if (MipsState.Operating64BitMode) { MipsState.WriteGPRSigned(inst.Rd, MipsState.ReadGPRSigned(inst.Rt) >> (MipsState.ReadGPR32Signed(inst.Rs) & 0x3F)); } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Dsra32(MipsInstruction inst) { if (MipsState.Operating64BitMode) { MipsState.WriteGPRSigned(inst.Rd, (MipsState.ReadGPRSigned(inst.Rt) >> (32 + inst.ShiftAmount))); } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Bltzl(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { DoBranchLikely(MipsState.ReadGPR32Signed(inst.Rs) < 0, inst); } else { DoBranchLikely(MipsState.ReadGPRSigned(inst.Rs) < 0, inst); } }
private void Inst_Slti(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { Boolean condition = MipsState.ReadGPR32Signed(inst.Rs) < ((Int32)(Int16)inst.Immediate); MipsState.WriteGPR32Unsigned(inst.Rt, condition ? 1U : 0U); } else { Boolean condition = MipsState.ReadGPRSigned(inst.Rs) < ((Int64)(Int16)inst.Immediate); MipsState.WriteGPRUnsigned(inst.Rt, condition ? 1UL : 0UL); } }
private void Inst_Ddivu(MipsInstruction inst) { if (MipsState.Operating64BitMode) { unchecked { MipsState.Hi = (UInt64)(MipsState.ReadGPRSigned(inst.Rs) / MipsState.ReadGPRSigned(inst.Rt)); MipsState.Lo = (UInt64)(MipsState.ReadGPRSigned(inst.Rs) % MipsState.ReadGPRSigned(inst.Rt)); } } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Dmult(MipsInstruction inst) { if (MipsState.Operating64BitMode) { BigInteger product = BigInteger.Multiply( new BigInteger(MipsState.ReadGPRSigned(inst.Rs)), new BigInteger(MipsState.ReadGPRSigned(inst.Rt))); MipsState.Lo = (UInt64)(product & 0xFFFFFFFFFFFFFFFFUL); MipsState.Hi = (UInt64)((product >> 64) & 0xFFFFFFFFFFFFFFFFUL); } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Dadid(MipsInstruction inst) { if (MipsState.Operating64BitMode) { try { MipsState.WriteGPRSigned(inst.Rd, MipsState.ReadGPRSigned(inst.Rs) + (Int64)(Int16)inst.Immediate); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Dsub(MipsInstruction inst) { if (MipsState.Operating64BitMode) { try { MipsState.WriteGPRSigned(inst.Rd, MipsState.ReadGPRSigned(inst.Rs) - MipsState.ReadGPRSigned(inst.Rt)); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Teqi(MipsInstruction inst) { Boolean condition; if (!MipsState.Operating64BitMode) { condition = MipsState.ReadGPR32Signed(inst.Rs) == (Int32)(Int16)inst.Immediate; } else { condition = MipsState.ReadGPRSigned(inst.Rs) == (Int64)(Int16)inst.Immediate; } if (condition) { CauseException = ExceptionCode.Trap; } }
private void Inst_Tlt(MipsInstruction inst) { Boolean condition; if (!MipsState.Operating64BitMode) { condition = MipsState.ReadGPR32Signed(inst.Rs) < MipsState.ReadGPR32Signed(inst.Rt); } else { condition = MipsState.ReadGPRSigned(inst.Rs) < MipsState.ReadGPRSigned(inst.Rt); } if (condition) { CauseException = ExceptionCode.Trap; } }
private void Inst_Sd(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { throw new InvalidOperationException("Instruction reserved"); } Int64 address = (MipsState.ReadGPRSigned(inst.Rs) + (Int64)inst.Immediate); if ((address & 7) != 0) { CauseException = ExceptionCode.AddressErrorStore; } else { DataManipulator.Store(address, MipsState.ReadGPRUnsigned(inst.Rt)); } }
private void Inst_Ddiv(MipsInstruction inst) { if (MipsState.Operating64BitMode) { try { MipsState.Hi = (UInt64)(MipsState.ReadGPRSigned(inst.Rs) / MipsState.ReadGPRSigned(inst.Rt)); MipsState.Lo = (UInt64)(MipsState.ReadGPRSigned(inst.Rs) % MipsState.ReadGPRSigned(inst.Rt)); } catch (OverflowException) { CauseException = ExceptionCode.OverFlow; } } else { CauseException = ExceptionCode.ReservedInstruction; } }
private void Inst_Jr(MipsInstruction inst) { DoJump(MipsState.ReadGPRSigned(inst.Rs)); }
private void Inst_Jalr(MipsInstruction inst) { DoJump(MipsState.ReadGPRSigned(inst.Rs)); MipsState.WriteGPRSigned(inst.Rd, inst.Address + 8); }
protected Int64 ComputeAddress(MipsInstruction inst) { return(((Int64)(Int16)inst.Immediate) + MipsState.ReadGPRSigned(inst.Rs)); }