public void LoadCpu(ICpuIdX86 cpu) { if (cpu == null) { throw new ArgumentNullException(nameof(cpu)); } Cpu = cpu; Cpus = new ICpuIdX86[] { cpu }; Initialize(); }
public CpuTopologyControl(ICpuIdX86 cpuId) { if (cpuId == null) { throw new ArgumentNullException(nameof(cpuId)); } // The CoreMask is used to know how many bits to show for the cache mask. int coreMask = 0; foreach (CpuTopo cpuLevel in cpuId.Topology.CoreTopology) { if (cpuLevel.TopoType == CpuTopoType.Package) { if (cpuLevel.Mask == 0) { coreMask = 8; } else { coreMask = GetBitSize(~cpuLevel.Mask); } } } if (coreMask < 8) { coreMask = 8; } InitializeComponent(); lblApicId.Text = cpuId.Topology.ApicId.ToString("X8"); foreach (CpuTopo cpuTopo in cpuId.Topology.CoreTopology) { ListViewItem lvi = new ListViewItem { Text = cpuTopo.TopoType.ToString(), SubItems = { cpuTopo.Id.ToString(), "" } }; if (cpuTopo.TopoType != CpuTopoType.Package) { lvi.SubItems[2].Text = Infrastructure.Text.ConvertToBitString(cpuTopo.Mask, coreMask); } lvwCpuTopo.Items.Add(lvi); } hdrPackageLevel.AutoResize(ColumnHeaderAutoResizeStyle.HeaderSize); hdrIdentifier.AutoResize(ColumnHeaderAutoResizeStyle.HeaderSize); hdrMask.AutoResize(ColumnHeaderAutoResizeStyle.HeaderSize); }
private string GetHypervisor(ICpuIdX86 x86Cpu) { if (!x86Cpu.Features["HYPERVISOR"]) { return(null); } CpuIdRegister hyper = x86Cpu.Registers.GetCpuId(HypervisorFunction, 0); return(GetHypervisor(hyper)); }
public void NoFunctions() { ICpuIdX86 cpu = GetCpu("nofunctions.xml"); Assert.That(cpu.VendorId, Is.EqualTo("GenuineIntel")); Assert.That(cpu.ProcessorSignature, Is.EqualTo(0)); Assert.That(cpu.Model, Is.EqualTo(0)); Assert.That(cpu.Family, Is.EqualTo(0)); Assert.That(cpu.ProcessorType, Is.EqualTo(0)); Assert.That(cpu.Stepping, Is.EqualTo(0)); Assert.That(cpu.Features["FPU"], Is.False); }
private static ICpuIdX86 GetCpu(string fileName) { string fullPath = Path.Combine(TestResources, fileName); CpuIdXmlFactory factory = new CpuIdXmlFactory(); ICpuId cpu = factory.Create(fullPath); ICpuIdX86 x86cpu = cpu as ICpuIdX86; Assert.That(x86cpu, Is.Not.Null); Assert.That(x86cpu.Topology.CoreTopology.IsReadOnly, Is.True); return(x86cpu); }
public CpuCacheControl(ICpuIdX86 cpuId) { if (cpuId == null) { throw new ArgumentNullException(nameof(cpuId)); } // The CoreMask is used to know how many bits to show for the cache mask. foreach (CpuTopo cpuLevel in cpuId.Topology.CoreTopology) { if (cpuLevel.TopoType == CpuTopoType.Package) { if (cpuLevel.Mask == 0) { m_CoreMask = 8; } else { m_CoreMask = GetBitSize(~cpuLevel.Mask); } } } if (m_CoreMask < 8) { m_CoreMask = 8; } InitializeComponent(); lblApicId.Text = cpuId.Topology.ApicId.ToString("X8"); foreach (CacheTopo cacheTopo in cpuId.Topology.CacheTopology) { if (cacheTopo is CacheTopoCpu cacheTopoCpu) { tvwCache.Nodes.Add(CacheCpuNode(cacheTopoCpu)); } else if (cacheTopo is CacheTopoTlb cacheTopoTlb) { tvwCache.Nodes.Add(CacheTlbNode(cacheTopoTlb)); } else if (cacheTopo is CacheTopoTrace cacheTopoTrace) { tvwCache.Nodes.Add(CacheTraceNode(cacheTopoTrace)); } else if (cacheTopo is CacheTopoPrefetch cacheTopoPrefetch) { tvwCache.Nodes.Add(CachePrefetchNode(cacheTopoPrefetch)); } } }
public FeatureCheck GetFeatureCpu(ICpuIdX86 cpu) { FeatureCheck newFeature = new FeatureCheck(); newFeature.LoadCpu(cpu); foreach (string group in m_FeatureSet.Keys) { foreach (FeatureSet set in m_FeatureSet[group]) { newFeature.AddFeatureSet(group, set.Name, set.Set); } } return(newFeature); }
public void NoFunctionsNoFunction1Query() { ICpuIdX86 cpu = GetCpu("nofunctions1.xml"); Assert.That(cpu.VendorId, Is.EqualTo("GenuineIntel")); // Even though the file contains CPUID[01h], it shouldn't be queried because 0h says it doesn't exist. Assert.That(cpu.ProcessorSignature, Is.EqualTo(0)); Assert.That(cpu.Model, Is.EqualTo(0)); Assert.That(cpu.Family, Is.EqualTo(0)); Assert.That(cpu.ProcessorType, Is.EqualTo(0)); Assert.That(cpu.Stepping, Is.EqualTo(0)); Assert.That(cpu.Features["FPU"], Is.False); }
public void I486_DX4() { ICpuIdX86 cpu = GetCpu("i486dx4.xml"); Assert.That(cpu.VendorId, Is.EqualTo("GenuineIntel")); // Even though the file contains CPUID[01h], it shouldn't be queried because 0h says it doesn't exist. Assert.That(cpu.ProcessorSignature, Is.EqualTo(0x482)); Assert.That(cpu.Model, Is.EqualTo(8)); Assert.That(cpu.Family, Is.EqualTo(4)); Assert.That(cpu.ProcessorType, Is.EqualTo(0)); Assert.That(cpu.Stepping, Is.EqualTo(2)); Assert.That(cpu.Features["FPU"], Is.True); GenuineIntelCpu intelCpu = cpu as GenuineIntelCpu; Assert.That(intelCpu, Is.Not.Null, "Expected Intel CPU"); Assert.That(intelCpu.Description, Is.EqualTo("IntelDX4(TM)")); }
public CpuDumpControl(ICpuIdX86 cpuId) { if (cpuId == null) { throw new ArgumentNullException(nameof(cpuId)); } InitializeComponent(); ListViewGroup lvg; ListViewGroup lvgs = lvwRegisters.Groups["lvgStandardFunctions"]; ListViewGroup lvgp = lvwRegisters.Groups["lvgPhiFunctions"]; ListViewGroup lvgh = lvwRegisters.Groups["lvgHypervisorFunctions"]; ListViewGroup lvge = lvwRegisters.Groups["lvgExtendedFunctions"]; foreach (CpuIdRegister reg in cpuId.Registers) { if (((reg.Function >> 28) & 0xF) == 0) { lvg = lvgs; } else if (((reg.Function >> 28) & 0xF) == 0x2) { lvg = lvgp; } else if (((reg.Function >> 28) & 0xF) == 0x4) { lvg = lvgh; } else { lvg = lvge; } AddRegister(unchecked (reg.Function), unchecked (reg.SubFunction), unchecked (reg.Result[0]), unchecked (reg.Result[1]), unchecked (reg.Result[2]), unchecked (reg.Result[3]), lvg); } }