private void Inst_Lwc1(MipsInstruction inst) { if (!CheckCop1Usable()) { CauseException = ExceptionCode.CopUnstable; return; } if (!CheckEvenOddAllowed(inst.Ft)) { CauseFPUException(FPUExceptionType.Unimplemented); return; } Int64 address = ComputeAddress(inst); UInt32 value = DataManipulator.LoadWordUnsigned(address); if (MipsState.CP0Regs.StatusReg.AdditionalFPR) { MipsState.Fpr.WriteFPRUnsigned(inst.Ft, value); } else { MipsState.Fpr.WriteFPR32Unsigned(inst.Ft, value); } }
private void Inst_Swr(MipsInstruction inst) { /* Thanks to PJ64 */ Int64 address = ComputeAddress(inst); Int32 offset = (Int32)(address & 3); UInt32 value = DataManipulator.LoadWordUnsigned(address & ~3); value &= SWRMask[offset]; value += MipsState.ReadGPR32Unsigned(inst.Rt) << SWRShift[offset]; DataManipulator.Store(address & ~3, value); }
private void Inst_Lwu(MipsInstruction inst) { if (!MipsState.Operating64BitMode) { CauseException = ExceptionCode.ReservedInstruction; return; } Int64 address = ComputeAddress(inst); if ((address & 3) != 0) { CauseException = ExceptionCode.AddressErrorLoad; } else { MipsState.WriteGPRUnsigned(inst.Rt, DataManipulator.LoadWordUnsigned(address)); } }