public byte read(AtaReg n_reg)
{
if (!loaded())
{
return(0xFF);
}
if (((reg.devhead ^ device_id) & 0x10) != 0)
{
return(0xFF);
}
if (n_reg == AtaReg.CommandStatus)
{
intrq = false;
}
if (n_reg == AtaReg.ControlAltStatus)
{
n_reg = AtaReg.CommandStatus; // read alt.status -> read status
}
if (n_reg == AtaReg.CommandStatus ||
(reg.status & HD_STATUS.STATUS_BSY) != 0)
{
// printf("state=%d\n",state); //Alone Coder
return((byte)reg.status);
} // BSY=1 or read status
// BSY = 0
//// if (reg.status & STATUS_DRQ) return 0xFF; // DRQ. ATA-5: registers should not be queried while DRQ=1, but programs do this!
// DRQ = 0
return(regs[(int)n_reg]);
}
public byte Read(AtaReg n_reg)
{
byte result = (byte)(Devices[0].read(n_reg) & Devices[1].read(n_reg));
//Logger.Debug("AtaPort.Read({0}) = 0x{1:X2}", n_reg, result);
return(result);
}
private void AtaWrite(AtaReg ataReg, byte value)
{
if (LogIo)
{
Logger.Info("IDE WR {0,-13}: #{1:X2} @ PC=#{2:X4}", ataReg, value, m_cpu.regs.PC);
}
m_ata.Write(ataReg, value);
}
private byte AtaRead(AtaReg ataReg)
{
var value = m_ata.Read(ataReg);
if (LogIo)
{
Logger.Info("IDE RD {0,-13}: #{1:X2} @ PC=#{2:X4}", ataReg, value, m_cpu.regs.PC);
}
return(value);
}
public void write(AtaReg n_reg, byte data)
{
// printf("dev=%d, reg=%d, data=%02X\n", device_id, n_reg, data);
if (!loaded())
{
return;
}
if (n_reg == AtaReg.FeatureError)
{
reg.feat = data;
return;
}
if (n_reg != AtaReg.CommandStatus)
{
regs[(int)n_reg] = data;
if ((reg.control & HD_CONTROL.CONTROL_SRST) != 0)
{
// printf("dev=%d, reset\n", device_id);
reset(RESET_TYPE.RESET_SRST);
}
return;
}
// execute command!
if (((reg.devhead ^ device_id) & 0x10) != 0 &&
data != 0x90)
{
return;
}
if ((reg.status & HD_STATUS.STATUS_DRDY) == 0 && !atapi)
{
Logger.Warn("ATA{0:X2}: hdd not ready cmd = #{1:X2} (ignored)", Id, data);
return;
}
reg.err = HD_ERROR.ERR_NONE;
intrq = false;
//{printf(" [");for (int q=1;q<9;q++) printf("-%02X",regs[q]);printf("]\n");}
if (exec_atapi_cmd(data))
{
return;
}
if (exec_ata_cmd(data))
{
return;
}
reg.status = HD_STATUS.STATUS_DSC | HD_STATUS.STATUS_DRDY | HD_STATUS.STATUS_ERR;
reg.err = HD_ERROR.ERR_ABRT;
state = HD_STATE.S_IDLE;
intrq = true;
}
public void Write(AtaReg n_reg, byte data)
{
//Logger.Debug("AtaPort.Write({0}, 0x{1:X2})", n_reg, data);
Devices[0].write(n_reg, data);
Devices[1].write(n_reg, data);
}