public bool ImageFill(byte R, byte G, byte B) { SL_Comm_Base.SPI_WriteReg(0xb7, 0x02, 0x59); SL_Comm_Base.SL_CommBase_WriteReg(0x92, 0x20); SL_Comm_Base.SL_CommBase_WriteReg(0xad, R, G, B); return(true); }
public bool SetMipiVideo(int vLanes, int hPixels, byte framerate, byte vbp, byte vfp, byte hbp, byte hfp, byte vsa, byte hsa) { byte HT_H = 0, HT_L = 0, VT_H = 0, VT_L = 0; int Value = 0; uint Val = 0; Value = hPixels + hsa + hbp + hfp; HT_H = (byte)(Value >> 8); HT_L = (byte)(Value & 0xff); HD_H = (byte)(hPixels >> 8); HD_L = (byte)(hPixels & 0xff); Value = vLanes + vsa + vbp + vfp; VT_H = (byte)(Value >> 8); VT_L = (byte)(Value & 0xff); VD_H = (byte)(vLanes >> 8); VD_L = (byte)(vLanes & 0xff); VBP = (byte)(vbp & 0xff); VFP = (byte)(vfp & 0xff); HBP = (byte)(hbp & 0xff); HFP = (byte)(hfp & 0xff); VSA = (byte)(vsa & 0xff); HSA = (byte)(hsa & 0xff); SL_Comm_Base.SL_CommBase_WriteReg(0xb4, HT_H, HT_L, HT_H, HT_L); //TH SL_Comm_Base.SL_CommBase_WriteReg(0xb6, HD_H, HD_L, HD_H, HD_L); //TH SL_Comm_Base.SL_CommBase_WriteReg(0xb8, 0x00, HBP, 0x00, HBP); SL_Comm_Base.SL_CommBase_WriteReg(0xba, HSA, HSA); SL_Comm_Base.SL_CommBase_WriteReg(0xb5, VT_H, VT_L, VT_H, VT_L); SL_Comm_Base.SL_CommBase_WriteReg(0xb7, VD_H, VD_L, VD_H, VD_L); SL_Comm_Base.SL_CommBase_WriteReg(0xb9, 0x00, VBP, 0x00, VBP); SL_Comm_Base.SL_CommBase_WriteReg(0xbb, VSA, VSA); SL_Comm_Base.SL_CommBase_WriteReg(0xad, 0x00, 0x00, 0x00);//Normal Data /*2828 Setting*/ SL_Comm_Base.SPI_WriteReg(0xb1, VSA, HSA); SL_Comm_Base.SPI_WriteReg(0xb2, VBP, HBP); SL_Comm_Base.SPI_WriteReg(0xb3, VFP, HFP); SL_Comm_Base.SPI_WriteReg(0xb4, VD_H, VD_L); SL_Comm_Base.SPI_WriteReg(0xb5, HD_H, HD_L); #if (DEBUG) SL_Comm_Base.SL_CommBase_ReadReg(0xb4, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xb5, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xb6, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xb7, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xb8, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xb9, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xba, ref Val, 2); SL_Comm_Base.SL_CommBase_ReadReg(0xbb, ref Val, 2); #endif return(true); }
public bool MipiWrite(byte[] Data) { byte[] WhiskyValue = Data; int DataNum = WhiskyValue.Length - 1; byte HD = 0, M_HD = 0, M_LD = 0, LD = 0, ConfRegH = 0, ConfRegL = 0; //General Packet if (WhiskyValue[0] == 0x29) { ConfRegH = 0x06; ConfRegL = 0x10; } if (WhiskyValue[0] == 0x03) { ConfRegH = 0x02; ConfRegL = 0x10; } if (WhiskyValue[0] == 0x13) { ConfRegH = 0x02; ConfRegL = 0x10; } if (WhiskyValue[0] == 0x23) { ConfRegH = 0x02; ConfRegL = 0x10; } //DCS if (WhiskyValue[0] == 0x39) { ConfRegH = 0x06; ConfRegL = 0x50; } if (WhiskyValue[0] == 0x05) { ConfRegH = 0x02; ConfRegL = 0x50; } if (WhiskyValue[0] == 0x15) { ConfRegH = 0x02; ConfRegL = 0x50; } LD = (byte)(DataNum & 0xff); M_LD = (byte)((DataNum >> 8) & 0xff); M_HD = (byte)((DataNum >> 16) & 0xff); HD = (byte)((DataNum >> 24) & 0xff); SL_Comm_Base.SPI_WriteReg(0xb7, ConfRegH, ConfRegL); SL_Comm_Base.SPI_WriteReg(0xbd, HD, M_HD); SL_Comm_Base.SPI_WriteReg(0xbc, M_LD, LD); SL_Comm_Base.BdgeSel(true); SL_Comm_Base.SL_CommBase_WriteReg(0x8b, 0xbf); SL_Comm_Base.SL_AddrWrite(0x8c); for (int i = 1; i < WhiskyValue.Length; i++) { SL_Comm_Base.SL_DataWrite(WhiskyValue[i]); } SL_Comm_Base.UnBgeSel(); return(true); }
private bool ImageWrite(SL_Img_Lib ImgLib) { List <byte> lXferData = new List <byte>(); ImgLib.BmpToList(ref lXferData); SL_Comm_Base.SL_CommBase_WriteReg(0xbc, 0x00); SL_Comm_Base.SL_CommBase_WriteReg(0x93, 0x03); SL_Comm_Base.SPI_WriteReg(0xb8, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xb7, 0x06, 0x59); Thread.Sleep(10); SL_Comm_Base.DDR_MassWrite(0x84, 1, lXferData.ToArray(), lXferData.Count); SL_Comm_Base.SPI_WriteReg(0xb8, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xb7, 0x06, 0x59); SL_Comm_Base.SL_CommBase_WriteReg(0xbc, 0x11); Thread.Sleep(2); return(true); }
public bool BridgeWrite(byte Addr, byte Data) { int ret = SL_Comm_Base.SPI_WriteReg(Addr, Data); return((ret == 0) ? true : false); }
public bool SetMipiDsi(int LaneCout, int MipiSpeed, string Mode) { double HS = Convert.ToDouble(MipiSpeed) / 10; int LaneNum = Convert.ToInt32(LaneCout); byte Lane = 0, LpVal = 0, FR = 0; if (HS > 6.25 && HS <= 12.5) { FR = 0x02; } if (HS > 12.6 && HS <= 25) { FR = 0x42; } if (HS > 25.1 && HS <= 50) { FR = 0x82; } if (HS > 50.1) { FR = 0xC2; } Lane = (LaneNum >= 1 && LaneNum <= 4) ? (byte)(LaneNum - 1) : (byte)0x03; LpVal = (byte)(MipiSpeed / 8 / 6); SL_Comm_Base.SPI_WriteReg(0xb9, 0x00, 0x00); //PLL disable SL_Comm_Base.SPI_WriteReg(0xb8, 0x00, 0x00); //VC(Virtual ChannelID) Control Register SL_Comm_Base.SPI_WriteReg(0xde, 0x00, Lane); //DSI lane setting,0x00:1 data lane ,0x01:2 data lane 0x02:3 data lane ,0x03:4 data lane SL_Comm_Base.SPI_WriteReg(0xb7, 0x02, 0x50); SL_Comm_Base.SPI_WriteReg(0xba, FR, (byte)HS); SL_Comm_Base.SPI_WriteReg(0xbb, 0x00, LpVal); SL_Comm_Base.SPI_WriteReg(0xb9, 0x00, 0x01); SL_Comm_Base.SPI_WriteReg(0xd6, 0x00, 0x05); if (Mode.CompareTo("syncpulse") == 0) { SL_Comm_Base.SPI_WriteReg(0xb1, VSA, HSA); //VICR1=> VSA,HSA SL_Comm_Base.SPI_WriteReg(0xb2, VBP, HBP); //VICR2=> VBP,HBP SL_Comm_Base.SPI_WriteReg(0xb3, VFP, HFP); //VICR3=> VFP,HFP SL_Comm_Base.SPI_WriteReg(0xb4, HD_H, HD_L); //VICR4=> HACT HDISP SL_Comm_Base.SPI_WriteReg(0xb5, VD_H, VD_L); //VICR5=> VACT VDISP // -----------clk lane in HS,when no data send-------------- SL_Comm_Base.SPI_WriteReg(0xb6, 0x00, 0x03); // 24bit Non burst mode with Sync pulses //SSD2825_spi_reg_data_wr(0xb6,0x00,0x02); // 18bit Non burst mode with Sync pulses, loosely packed //SSD2825_spi_reg_data_wr(0xb6,0x00,0x01); // 18bit Non burst mode with Sync pulses, packed //SSD2825_spi_reg_data_wr(0xb6,0x00,0x00); // 16bit Non burst mode with Sync pulses } if (Mode.CompareTo("burst") == 0) { SL_Comm_Base.SPI_WriteReg(0xb1, VSA, HSA); //VICR1=> VSA,HSA SL_Comm_Base.SPI_WriteReg(0xb2, (byte)(VBP + VSA), (byte)(HBP + HSA)); //VICR2=> VBP,HBP (BP+SA) SL_Comm_Base.SPI_WriteReg(0xb3, VFP, HFP); //VICR3=> VFP,HFP SL_Comm_Base.SPI_WriteReg(0xb4, HD_H, HD_L); //VICR4=> HACT HDISP SL_Comm_Base.SPI_WriteReg(0xb5, VD_H, VD_L); //VICR5=> VACT VDISP SL_Comm_Base.SPI_WriteReg(0xb6, 0x00, 0x1b); // 0x1b , bit5 : 0: continue clock ,1: non continue clock } if (Mode.CompareTo("syncevent") == 0) { SL_Comm_Base.SPI_WriteReg(0xb1, VSA, HSA); //VICR1=> VSA,HSA SL_Comm_Base.SPI_WriteReg(0xb2, (byte)(VBP + VSA), (byte)(HBP + HSA)); //VICR2=> VBP,HBP (BP+SA) SL_Comm_Base.SPI_WriteReg(0xb3, VFP, HFP); //VICR3=> VFP,HFP SL_Comm_Base.SPI_WriteReg(0xb4, HD_H, HD_L); //VICR4=> HACT HDISP SL_Comm_Base.SPI_WriteReg(0xb5, VD_H, VD_L); //VICR5=> VACT VDISP // -----------clk lane in HS,when no data send-------------- SL_Comm_Base.SPI_WriteReg(0xb6, 0x00, 0x07); //0x03,bit5 } return(true); }
public bool MipiHSRead(byte Addr, byte RdNum, ref string RdStr) { byte RdNumH = 0, RdNumeL = 0, C2_1 = 0, C2_2 = 0, C6_1 = 0, C6_2 = 0, Ready = 0; int i = 0, k = 0, l = 0; uint Value = 0; SL_Comm_Base.SPI_WriteReg(0xb8, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xb7, 0x02, 0x89); SL_Comm_Base.SPI_WriteReg(0xbd, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xbc, 0x00, 0x01); RdNumH = (byte)(RdNum >> 8); RdNumeL = (byte)(RdNum & 0xff); SL_Comm_Base.SPI_WriteReg(0xc1, RdNumH, RdNumeL); SL_Comm_Base.SPI_AddrWr(0xbf); SL_Comm_Base.SPI_DataWr(Addr); Thread.Sleep(20); SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); SL_Comm_Base.SPI_AddrWrNoCs(0xc2); SL_Comm_Base.SPI_AddrWrNoCs(0xfa); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); C2_1 = SL_Comm_Base.SL_DataDummyRd(); C2_2 = SL_Comm_Base.SL_DataDummyRd(); SL_Comm_Base.UnBgeSel(); Thread.Sleep(10); SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); SL_Comm_Base.SPI_AddrWrNoCs(0xc6); SL_Comm_Base.SPI_AddrWrNoCs(0xfa); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); C6_1 = SL_Comm_Base.SL_DataDummyRd(); C6_2 = SL_Comm_Base.SL_DataDummyRd(); SL_Comm_Base.UnBgeSel(); Thread.Sleep(10); Ready = (byte)(C6_1 & 0x01); if (Ready == 1) { SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); i = ((C2_2 * 256) + C2_1); SL_Comm_Base.SPI_AddrWrNoCs(0xff); l = 16 * (1 + i / 16); for (k = 0; k < l; k++) { if (k == 0) { SL_Comm_Base.SPI_AddrWrNoCs(0xFA); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); } Value = SL_Comm_Base.SL_DataDummyRd(); if (k < i) { RdStr += "Rd[" + k + "]= 0x" + Convert.ToString(Value, 16) + " "; } } SL_Comm_Base.UnBgeSel(); } return(true); }
public bool MipiRead(byte Addr, byte RdNum, ref byte[] RdVal) { byte RdNumH = 0, RdNumeL = 0, C2_1 = 0, C2_2 = 0, C6_1 = 0, C6_2 = 0, Ready = 0; int i = 0, k = 0, l = 0, j = 2; uint Value = 0; bool ret = true; if (RdVal.Length != RdNum) { return(false); } SL_Comm_Base.SPI_WriteReg(0xb8, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xb7, 0x02, 0x80); SL_Comm_Base.SPI_WriteReg(0xbd, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xbc, 0x00, 0x01); RdNumH = (byte)(RdNum >> 8); RdNumeL = (byte)(RdNum & 0xff); SL_Comm_Base.SPI_WriteReg(0xc1, RdNumH, RdNumeL); SL_Comm_Base.SPI_AddrWr(0xbf); SL_Comm_Base.SPI_DataWr(Addr); Thread.Sleep(20); SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); SL_Comm_Base.SPI_AddrWrNoCs(0xc2); SL_Comm_Base.SPI_AddrWrNoCs(0xfa); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); C2_1 = SL_Comm_Base.SL_DataDummyRd(); C2_2 = SL_Comm_Base.SL_DataDummyRd(); SL_Comm_Base.UnBgeSel(); Thread.Sleep(20); SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); SL_Comm_Base.SPI_AddrWrNoCs(0xc6); SL_Comm_Base.SPI_AddrWrNoCs(0xfa); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); C6_1 = SL_Comm_Base.SL_DataDummyRd(); C6_2 = SL_Comm_Base.SL_DataDummyRd(); SL_Comm_Base.UnBgeSel(); Thread.Sleep(10); Ready = (byte)(C6_1 & 0x01); if (Ready == 1) { SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); i = ((C2_2 * 256) + C2_1); SL_Comm_Base.SPI_AddrWrNoCs(0xff); l = 16 * (1 + i / 16); for (k = 0; k < l; k++) { if (j == 2) { SL_Comm_Base.SPI_AddrWrNoCs(0xFA); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); j = 0; } Value = SL_Comm_Base.SL_DataDummyRd(); if (k < i) { RdVal[k] = (byte)Value; } j++; } SL_Comm_Base.UnBgeSel(); ret = true; } else { ret = false; } return(ret); }
public bool MipiHSRead(byte Addr, byte RdNum, ref string RdStr) { byte RdNumH = 0, RdNumeL = 0, C2_1 = 0, C2_2 = 0, C6_1 = 0, C6_2 = 0, Ready = 0, BTAR = 0, LPTO = 0, DST = 0, CST = 0; int i = 0, k = 0, l = 0, j = 2; uint Value = 0; bool ret = true; RdStr = null; SL_Comm_Base.SPI_WriteReg(0xb8, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xb7, 0x02, 0x89); SL_Comm_Base.SPI_WriteReg(0xbd, 0x00, 0x00); SL_Comm_Base.SPI_WriteReg(0xbc, 0x00, 0x01); RdNumH = (byte)(RdNum >> 8); RdNumeL = (byte)(RdNum & 0xff); SL_Comm_Base.SPI_WriteReg(0xc1, RdNumH, RdNumeL); SL_Comm_Base.SPI_AddrWr(0xbf); SL_Comm_Base.SPI_DataWr(Addr); Thread.Sleep(20); SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); SL_Comm_Base.SPI_AddrWrNoCs(0xc2); Thread.Sleep(1); SL_Comm_Base.SPI_AddrWrNoCs(0xfa); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); C2_1 = SL_Comm_Base.SL_DataDummyRd(); C2_2 = SL_Comm_Base.SL_DataDummyRd(); SL_Comm_Base.UnBgeSel(); Thread.Sleep(20); SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); SL_Comm_Base.SPI_AddrWrNoCs(0xc6); Thread.Sleep(1); SL_Comm_Base.SPI_AddrWrNoCs(0xfa); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); C6_1 = SL_Comm_Base.SL_DataDummyRd(); C6_2 = SL_Comm_Base.SL_DataDummyRd(); SL_Comm_Base.UnBgeSel(); Thread.Sleep(20); CST = (byte)((C6_2 & 0x8) >> 3); DST = (byte)((C6_2 & 0x4) >> 2); LPTO = (byte)((C6_1 & 0x40) >> 6); BTAR = (byte)((C6_1 & 0x04) >> 2); Ready = (byte)(C6_1 & 0x01); if (LPTO == 1) { SL_Comm_Base.SPI_WriteReg(0xc0, 0x00, 0x01); Thread.Sleep(50); } Thread.Sleep(10); if (Ready == 1) { SL_Comm_Base.SL_CommBase_WriteReg(0xb3, SL_Comm_Base.ChipSel()); i = ((C2_2 * 256) + C2_1); SL_Comm_Base.SPI_AddrWrNoCs(0xff); l = 16 * (1 + i / 16); for (k = 0; k < l; k++) { if (j == 2) { SL_Comm_Base.SPI_AddrWrNoCs(0xFA); SL_Comm_Base.SL_AddrWrite(SL_Comm_Base.DATARDMODE_2828); j = 0; } Value = SL_Comm_Base.SL_DataDummyRd(); if (k < i) { RdStr += "Rd[" + k + "]= 0x" + Convert.ToString(Value, 16) + " "; } j++; } SL_Comm_Base.UnBgeSel(); ret = true; } else { ret = false; RdStr = "Mipi Read Not Ready"; } return(ret); }