public IEnumerator <RtlInstructionCluster> GetEnumerator()
{
while (dasm.MoveNext())
{
this.instrCur = dasm.Current;
var instrs = new List <RtlInstruction>();
this.rtlc = instrCur.InstructionClass;
this.m = new RtlEmitter(instrs);
switch (instrCur.Code)
{
default:
EmitUnitTest();
rtlc = InstrClass.Invalid;
m.Invalid();
break;
case Opcode.illegal: m.Invalid(); break;
case Opcode.adc: Adc(); break;
case Opcode.and: And(); break;
case Opcode.asl: Asl(); break;
case Opcode.bcc: Branch(ConditionCode.UGE, FlagM.CF); break;
case Opcode.bcs: Branch(ConditionCode.ULT, FlagM.CF); break;
case Opcode.beq: Branch(ConditionCode.EQ, FlagM.ZF); break;
case Opcode.bit: Bit(); break;
case Opcode.bmi: Branch(ConditionCode.SG, FlagM.NF); break;
case Opcode.bne: Branch(ConditionCode.NE, FlagM.ZF); break;
case Opcode.bpl: Branch(ConditionCode.NS, FlagM.NF); break;
case Opcode.brk: Brk(); break;
case Opcode.bvc: Branch(ConditionCode.NO, FlagM.VF); break;
case Opcode.bvs: Branch(ConditionCode.OV, FlagM.VF); break;
case Opcode.clc: SetFlag(FlagM.CF, false); break;
case Opcode.cld: SetFlag(FlagM.DF, false); break;
case Opcode.cli: SetFlag(FlagM.IF, false); break;
case Opcode.clv: SetFlag(FlagM.VF, false); break;
case Opcode.cmp: Cmp(Registers.a); break;
case Opcode.cpx: Cmp(Registers.x); break;
case Opcode.cpy: Cmp(Registers.y); break;
case Opcode.dec: Dec(); break;
case Opcode.dex: Dec(Registers.x); break;
case Opcode.dey: Dec(Registers.y); break;
case Opcode.eor: Eor(); break;
case Opcode.inc: Inc(); break;
case Opcode.inx: Inc(Registers.x); break;
case Opcode.iny: Inc(Registers.y); break;
case Opcode.jmp: Jmp(); break;
case Opcode.jsr: Jsr(); break;
case Opcode.lda: Ld(Registers.a); break;
case Opcode.ldx: Ld(Registers.x); break;
case Opcode.ldy: Ld(Registers.y); break;
case Opcode.lsr: Lsr(); break;
case Opcode.nop: m.Nop(); break;
case Opcode.ora: Ora(); break;
case Opcode.pha: Push(Registers.a); break;
case Opcode.php: Push(AllFlags()); break;
case Opcode.pla: Pull(Registers.a); break;
case Opcode.plp: Plp(); break;
case Opcode.rol: Rotate(PseudoProcedure.Rol); break;
case Opcode.ror: Rotate(PseudoProcedure.Ror); break;
case Opcode.rti: Rti(); break;
case Opcode.rts: Rts(); break;
case Opcode.sbc: Sbc(); break;
case Opcode.sec: SetFlag(FlagM.CF, true); break;
case Opcode.sed: SetFlag(FlagM.DF, true); break;
case Opcode.sei: SetFlag(FlagM.IF, true); break;
case Opcode.sta: St(Registers.a); break;
case Opcode.stx: St(Registers.x); break;
case Opcode.sty: St(Registers.y); break;
case Opcode.tax: Copy(Registers.x, Registers.a); break;
case Opcode.tay: Copy(Registers.y, Registers.a); break;
case Opcode.tsx: Copy(Registers.x, Registers.s); break;
case Opcode.txa: Copy(Registers.a, Registers.x); break;
case Opcode.txs: Copy(Registers.s, Registers.x); break;
case Opcode.tya: Copy(Registers.a, Registers.y); break;
}
yield return(new RtlInstructionCluster(
instrCur.Address,
instrCur.Length,
instrs.ToArray())
{
Class = rtlc
});
}
}