private static CPUID[][] GroupThreadsByCore(IEnumerable <CPUID> threads) { var cores = new SortedDictionary <uint, List <CPUID> >(); foreach (var thread in threads) { List <CPUID> coreList; cores.TryGetValue(thread.CoreId, out coreList); if (coreList == null) { coreList = new List <CPUID>(); cores.Add(thread.CoreId, coreList); } coreList.Add(thread); } var coreThreads = new CPUID[cores.Count][]; var index = 0; foreach (var list in cores.Values) { coreThreads[index] = list.ToArray(); index++; } return(coreThreads); }
private CPUID[][] GroupThreadsByCore(CPUID[] threads) { SortedDictionary <uint, List <CPUID> > cores = new SortedDictionary <uint, List <CPUID> >(); foreach (CPUID thread in threads) { List <CPUID> coreList; cores.TryGetValue(thread.CoreId, out coreList); if (coreList == null) { coreList = new List <CPUID>(); cores.Add(thread.CoreId, coreList); } coreList.Add(thread); } CPUID[][] coreThreads = new CPUID[cores.Count][]; int index = 0; foreach (List <CPUID> list in cores.Values) { coreThreads[index] = list.ToArray(); index++; } return(coreThreads); }
private static CPUID[][] GetProcessorThreads() { List<CPUID> threads = new List<CPUID>(); for (int i = 0; i < 64; i++) { try { threads.Add(new CPUID(i)); } catch (ArgumentOutOfRangeException) { } } SortedDictionary<uint, List<CPUID>> processors = new SortedDictionary<uint, List<CPUID>>(); foreach (CPUID thread in threads) { List<CPUID> list; processors.TryGetValue(thread.ProcessorId, out list); if (list == null) { list = new List<CPUID>(); processors.Add(thread.ProcessorId, list); } list.Add(thread); } CPUID[][] processorThreads = new CPUID[processors.Count][]; int index = 0; foreach (List<CPUID> list in processors.Values) { processorThreads[index] = list.ToArray(); index++; } return processorThreads; }
public CPULoad(CPUID[][] cpuid) { this.cpuid = cpuid; this.coreLoads = new float[cpuid.Length]; this.totalLoad = 0; try { GetTimes(out idleTimes, out totalTimes); } catch (Exception) { this.idleTimes = null; this.totalTimes = null; } if (idleTimes != null) available = true; }
public AMD0FCPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(processorIndex, cpuid, settings) { float offset = -49.0f; // AM2+ 65nm +21 offset uint model = cpuid[0][0].Model; if (model >= 0x69 && model != 0xc1 && model != 0x6c && model != 0x7c) offset += 21; if (model < 40) { // AMD Athlon 64 Processors thermSenseCoreSelCPU0 = 0x0; thermSenseCoreSelCPU1 = 0x4; } else { // AMD NPT Family 0Fh Revision F, G have the core selection swapped thermSenseCoreSelCPU0 = 0x4; thermSenseCoreSelCPU1 = 0x0; } // check if processor supports a digital thermal sensor if (cpuid[0][0].ExtData.GetLength(0) > 7 && (cpuid[0][0].ExtData[7, 3] & 1) != 0) { coreTemperatures = new Sensor[coreCount]; for (int i = 0; i < coreCount; i++) { coreTemperatures[i] = new Sensor("Core #" + (i + 1), i, SensorType.Temperature, this, new [] { new ParameterDescription("Offset [°C]", "Temperature offset of the thermal sensor.\n" + "Temperature = Value + Offset.", offset) }, settings); } } else { coreTemperatures = new Sensor[0]; } miscellaneousControlAddress = GetPciAddress( MISCELLANEOUS_CONTROL_FUNCTION, MISCELLANEOUS_CONTROL_DEVICE_ID); busClock = new Sensor("Bus Speed", 0, SensorType.Clock, this, settings); coreClocks = new Sensor[coreCount]; for (int i = 0; i < coreClocks.Length; i++) { coreClocks[i] = new Sensor(CoreString(i), i + 1, SensorType.Clock, this, settings); if (HasTimeStampCounter) ActivateSensor(coreClocks[i]); } Update(); }
private static CPUID[][] GetProcessorThreads() { List <CPUID> threads = new List <CPUID>(); for (int i = 0; i < ThreadAffinity.ProcessorGroupCount; i++) { for (int j = 0; j < 64; j++) { try { if (!ThreadAffinity.IsValid(GroupAffinity.Single((ushort)i, j))) { continue; } var cpuid = CPUID.Get(i, j); if (cpuid != null) { threads.Add(cpuid); } } catch (ArgumentOutOfRangeException) { } } } SortedDictionary <uint, List <CPUID> > processors = new SortedDictionary <uint, List <CPUID> >(); foreach (CPUID thread in threads) { List <CPUID> list; processors.TryGetValue(thread.ProcessorId, out list); if (list == null) { list = new List <CPUID>(); processors.Add(thread.ProcessorId, list); } list.Add(thread); } CPUID[][] processorThreads = new CPUID[processors.Count][]; int index = 0; foreach (List <CPUID> list in processors.Values) { processorThreads[index] = list.ToArray(); index++; } return(processorThreads); }
private static CPUID[][] GetProcessorThreads() { List <CPUID> threads = new List <CPUID>(); for (int i = 0; i < 64; i++) { try { threads.Add(new CPUID(i)); } catch (ArgumentOutOfRangeException) { // All cores found. break; } } SortedDictionary <uint, List <CPUID> > processors = new SortedDictionary <uint, List <CPUID> >(); foreach (CPUID thread in threads) { List <CPUID> list; processors.TryGetValue(thread.ProcessorId, out list); if (list == null) { list = new List <CPUID>(); processors.Add(thread.ProcessorId, list); } list.Add(thread); } CPUID[][] processorThreads = new CPUID[processors.Count][]; int index = 0; foreach (List <CPUID> list in processors.Values) { processorThreads[index] = list.ToArray(); index++; } return(processorThreads); }
public AMD17CPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(processorIndex, cpuid, settings) { // add all numa nodes // Register ..1E_ECX, [10:8] + 1 _ryzen = new Processor(this); int NodesPerProcessor = 1 + (int)((cpuid[0][0].ExtData[0x1e, ECX] >> 8) & 0x7); // add all numa nodes foreach (CPUID[] cpu in cpuid) { CPUID thread = cpu[0]; // coreID // Register ..1E_EBX, [7:0] int core_id = (int)(thread.ExtData[0x1e, EBX] & 0xff); // nodeID // Register ..1E_ECX, [7:0] int node_id = (int)(thread.ExtData[0x1e, ECX] & 0xff); _ryzen.AppendThread(null, node_id, core_id); } // add all threads to numa nodes and specific core foreach (CPUID[] cpu in cpuid) { CPUID thread = cpu[0]; // coreID // Register ..1E_EBX, [7:0] int core_id = (int)(thread.ExtData[0x1e, EBX] & 0xff); // nodeID // Register ..1E_ECX, [7:0] int node_id = (int)(thread.ExtData[0x1e, ECX] & 0xff); _ryzen.AppendThread(thread, node_id, core_id); } Update(); }
public AMD17CPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(processorIndex, cpuid, settings) { // add all numa nodes // Register ..1E_ECX, [10:8] + 1 _ryzen = new Processor(this); // add all numa nodes const int initialCoreId = 1_000_000_000; int coreId = 1; int lastCoreId = initialCoreId; // Ryzen 3000's skip some core ids. // So start at 1 and count upwards when the read core changes. foreach (CPUID[] cpu in cpuid.OrderBy(x => x[0].ExtData[0x1e, EBX] & 0xFF)) { CPUID thread = cpu[0]; // coreID // Register ..1E_EBX, [7:0] int coreIdRead = (int)(thread.ExtData[0x1e, EBX] & 0xff); // nodeID // Register ..1E_ECX, [7:0] int nodeId = (int)(thread.ExtData[0x1e, ECX] & 0xff); _ryzen.AppendThread(thread, nodeId, coreId); if (lastCoreId != initialCoreId && coreIdRead != lastCoreId) { coreId++; } lastCoreId = coreIdRead; } Update(); }
public void AppendThread(CPUID thread, int core_id) { Core core = null; foreach (var c in Cores) { if (c.CoreId == core_id) { core = c; } } if (core == null) { core = new Core(_hw, core_id); Cores.Add(core); } if (thread != null) { core.Threads.Add(thread); } }
public void AppendThread(CPUID thread, int numa_id, int core_id) { NumaNode node = null; foreach (var n in Nodes) { if (n.NodeId == numa_id) { node = n; } } if (node == null) { node = new NumaNode(_hw, numa_id); Nodes.Add(node); } if (thread != null) { node.AppendThread(thread, core_id); } }
private static CPUID[][] GroupThreadsByCore(IEnumerable<CPUID> threads) { SortedDictionary<uint, List<CPUID>> cores = new SortedDictionary<uint, List<CPUID>>(); foreach (CPUID thread in threads) { List<CPUID> coreList; cores.TryGetValue(thread.CoreId, out coreList); if (coreList == null) { coreList = new List<CPUID>(); cores.Add(thread.CoreId, coreList); } coreList.Add(thread); } CPUID[][] coreThreads = new CPUID[cores.Count][]; int index = 0; foreach (List<CPUID> list in cores.Values) { coreThreads[index] = list.ToArray(); index++; } return coreThreads; }
public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(processorIndex, cpuid, settings) { // set tjMax float[] tjMax; switch (family) { case 0x06: { switch (model) { case 0x0F: // Intel Core 2 (65nm) microarchitecture = Microarchitecture.Core; switch (stepping) { case 0x06: // B2 switch (coreCount) { case 2: tjMax = Floats(80 + 10); break; case 4: tjMax = Floats(90 + 10); break; default: tjMax = Floats(85 + 10); break; } tjMax = Floats(80 + 10); break; case 0x0B: // G0 tjMax = Floats(90 + 10); break; case 0x0D: // M0 tjMax = Floats(85 + 10); break; default: tjMax = Floats(85 + 10); break; } break; case 0x17: // Intel Core 2 (45nm) microarchitecture = Microarchitecture.Core; tjMax = Floats(100); break; case 0x1C: // Intel Atom (45nm) microarchitecture = Microarchitecture.Atom; switch (stepping) { case 0x02: // C0 tjMax = Floats(90); break; case 0x0A: // A0, B0 tjMax = Floats(100); break; default: tjMax = Floats(90); break; } break; case 0x1A: // Intel Core i7 LGA1366 (45nm) case 0x1E: // Intel Core i5, i7 LGA1156 (45nm) case 0x1F: // Intel Core i5, i7 case 0x25: // Intel Core i3, i5, i7 LGA1156 (32nm) case 0x2C: // Intel Core i7 LGA1366 (32nm) 6 Core case 0x2E: // Intel Xeon Processor 7500 series (45nm) case 0x2F: // Intel Xeon Processor (32nm) microarchitecture = Microarchitecture.Nehalem; tjMax = GetTjMaxFromMSR(); break; case 0x2A: // Intel Core i5, i7 2xxx LGA1155 (32nm) case 0x2D: // Next Generation Intel Xeon, i7 3xxx LGA2011 (32nm) microarchitecture = Microarchitecture.SandyBridge; tjMax = GetTjMaxFromMSR(); break; case 0x3A: // Intel Core i5, i7 3xxx LGA1155 (22nm) case 0x3E: // Intel Core i7 4xxx LGA2011 (22nm) microarchitecture = Microarchitecture.IvyBridge; tjMax = GetTjMaxFromMSR(); break; case 0x3C: // Intel Core i5, i7 4xxx LGA1150 (22nm) case 0x3F: // Intel Xeon E5-2600/1600 v3, Core i7-59xx // LGA2011-v3, Haswell-E (22nm) case 0x45: // Intel Core i5, i7 4xxxU (22nm) case 0x46: microarchitecture = Microarchitecture.Haswell; tjMax = GetTjMaxFromMSR(); break; case 0x3D: // Intel Core M-5xxx (14nm) microarchitecture = Microarchitecture.Broadwell; tjMax = GetTjMaxFromMSR(); break; case 0x36: // Intel Atom S1xxx, D2xxx, N2xxx (32nm) microarchitecture = Microarchitecture.Atom; tjMax = GetTjMaxFromMSR(); break; case 0x37: // Intel Atom E3xxx, Z3xxx (22nm) case 0x4A: case 0x4D: // Intel Atom C2xxx (22nm) case 0x5A: case 0x5D: microarchitecture = Microarchitecture.Silvermont; tjMax = GetTjMaxFromMSR(); break; case 0x4E: case 0x5E: // Intel Core i5, i7 6xxxx LGA1151 (14nm) microarchitecture = Microarchitecture.Skylake; tjMax = GetTjMaxFromMSR(); break; default: microarchitecture = Microarchitecture.Unknown; tjMax = Floats(100); break; } } break; case 0x0F: { switch (model) { case 0x00: // Pentium 4 (180nm) case 0x01: // Pentium 4 (130nm) case 0x02: // Pentium 4 (130nm) case 0x03: // Pentium 4, Celeron D (90nm) case 0x04: // Pentium 4, Pentium D, Celeron D (90nm) case 0x06: // Pentium 4, Pentium D, Celeron D (65nm) microarchitecture = Microarchitecture.NetBurst; tjMax = Floats(100); break; default: microarchitecture = Microarchitecture.Unknown; tjMax = Floats(100); break; } } break; default: microarchitecture = Microarchitecture.Unknown; tjMax = Floats(100); break; } // set timeStampCounterMultiplier switch (microarchitecture) { case Microarchitecture.NetBurst: case Microarchitecture.Atom: case Microarchitecture.Core: { uint eax, edx; if (Ring0.Rdmsr(IA32_PERF_STATUS, out eax, out edx)) { timeStampCounterMultiplier = ((edx >> 8) & 0x1f) + 0.5 * ((edx >> 14) & 1); } } break; case Microarchitecture.Nehalem: case Microarchitecture.SandyBridge: case Microarchitecture.IvyBridge: case Microarchitecture.Haswell: case Microarchitecture.Broadwell: case Microarchitecture.Silvermont: case Microarchitecture.Skylake: { uint eax, edx; if (Ring0.Rdmsr(MSR_PLATFORM_INFO, out eax, out edx)) { timeStampCounterMultiplier = (eax >> 8) & 0xff; } } break; default: timeStampCounterMultiplier = 0; break; } // check if processor supports a digital thermal sensor at core level if (cpuid[0][0].Data.GetLength(0) > 6 && (cpuid[0][0].Data[6, 0] & 1) != 0 && microarchitecture != Microarchitecture.Unknown) { coreTemperatures = new Sensor[coreCount]; for (int i = 0; i < coreTemperatures.Length; i++) { coreTemperatures[i] = new Sensor(CoreString(i), i, SensorType.Temperature, this, new[] { new ParameterDescription( "TjMax [°C]", "TjMax temperature of the core sensor.\n" + "Temperature = TjMax - TSlope * Value.", tjMax[i]), new ParameterDescription("TSlope [°C]", "Temperature slope of the digital thermal sensor.\n" + "Temperature = TjMax - TSlope * Value.", 1)}, settings); ActivateSensor(coreTemperatures[i]); } } else { coreTemperatures = new Sensor[0]; } // check if processor supports a digital thermal sensor at package level if (cpuid[0][0].Data.GetLength(0) > 6 && (cpuid[0][0].Data[6, 0] & 0x40) != 0 && microarchitecture != Microarchitecture.Unknown) { packageTemperature = new Sensor("CPU Package", coreTemperatures.Length, SensorType.Temperature, this, new[] { new ParameterDescription( "TjMax [°C]", "TjMax temperature of the package sensor.\n" + "Temperature = TjMax - TSlope * Value.", tjMax[0]), new ParameterDescription("TSlope [°C]", "Temperature slope of the digital thermal sensor.\n" + "Temperature = TjMax - TSlope * Value.", 1)}, settings); ActivateSensor(packageTemperature); } busClock = new Sensor("Bus Speed", 0, SensorType.Clock, this, settings); coreClocks = new Sensor[coreCount]; for (int i = 0; i < coreClocks.Length; i++) { coreClocks[i] = new Sensor(CoreString(i), i + 1, SensorType.Clock, this, settings); if (HasTimeStampCounter && microarchitecture != Microarchitecture.Unknown) ActivateSensor(coreClocks[i]); } if (microarchitecture == Microarchitecture.SandyBridge || microarchitecture == Microarchitecture.IvyBridge || microarchitecture == Microarchitecture.Haswell || microarchitecture == Microarchitecture.Broadwell || microarchitecture == Microarchitecture.Skylake || microarchitecture == Microarchitecture.Silvermont) { powerSensors = new Sensor[energyStatusMSRs.Length]; lastEnergyTime = new DateTime[energyStatusMSRs.Length]; lastEnergyConsumed = new uint[energyStatusMSRs.Length]; uint eax, edx; if (Ring0.Rdmsr(MSR_RAPL_POWER_UNIT, out eax, out edx)) switch (microarchitecture) { case Microarchitecture.Silvermont: energyUnitMultiplier = 1.0e-6f * (1 << (int)((eax >> 8) & 0x1F)); break; default: energyUnitMultiplier = 1.0f / (1 << (int)((eax >> 8) & 0x1F)); break; } if (energyUnitMultiplier != 0) { for (int i = 0; i < energyStatusMSRs.Length; i++) { if (!Ring0.Rdmsr(energyStatusMSRs[i], out eax, out edx)) continue; lastEnergyTime[i] = DateTime.UtcNow; lastEnergyConsumed[i] = eax; powerSensors[i] = new Sensor(powerSensorLabels[i], i, SensorType.Power, this, settings); ActivateSensor(powerSensors[i]); } } } // Create attribute sensors { uint eax, edx; if ( Ring0.Rdmsr(0x1ad, out eax, out edx) ) { var oneCore = Bitmask.GetValue(eax, 31, 24); var threeCore = Bitmask.GetValue(eax, 23, 16); var twoCore = Bitmask.GetValue(eax, 15, 8); var allCore = Bitmask.GetValue(eax, 7, 0); var turbo1Core = new Sensor("Turbo Ratio (1 Core)", 51101, SensorType.Factor, this, settings); var turbo2Core = new Sensor("Turbo Ratio (2 Core)", 51102, SensorType.Factor, this, settings); var turbo3Core = new Sensor("Turbo Ratio (3 Core)", 51103, SensorType.Factor, this, settings); var turbo4Core = new Sensor("Turbo Ratio (4 Core)", 51104, SensorType.Factor, this, settings); turbo1Core.Value = oneCore; turbo2Core.Value = threeCore; turbo3Core.Value = twoCore; turbo4Core.Value = allCore; ActivateSensor(turbo1Core); ActivateSensor(turbo2Core); ActivateSensor(turbo3Core); ActivateSensor(turbo4Core); } // IA32_PERF_STATUS // REF: http://sourceforge.net/p/freedos/mailman/message/31894268/ /* Register EAX bits 0..7: the current VID. Processor specific and not documented. Possible values are in the 0 - 0x3F range. E.g. on the Core 2 Duo E7500 the range is 0x22 - 0x38 that is 1.1v - 1.3 v. Register EAX bits 8..15: the current FID. Apparently this value (contrary to official Intel documentation) is not processor specific and is equivalent to the current multiplier. Register EDX bits 0..7: The maximum VID value. Register EDX bits 8..15: The maximum FID value (multiplier). Register EDX bits 16..23: The minimum VID value. Register EDX bits 24..31: The minimum FID value (multiplier). */ if (Ring0.Rdmsr(0x198, out eax, out edx)) { var a = Bitmask.GetValue(edx, 0, 7); var b = Bitmask.GetValue(edx, 8, 15); var c = Bitmask.GetValue(edx, 16, 23); var d = Bitmask.GetValue(edx, 24, 31); var maxVID = new Sensor("Maximum VID", 51201, SensorType.Factor, this, settings); var maxFID = new Sensor("Maximum FID", 51202, SensorType.Factor, this, settings); var minVID = new Sensor("Minimum VID", 51203, SensorType.Factor, this, settings); var minFID = new Sensor("Minimum FID", 51204, SensorType.Factor, this, settings); maxVID.Value = a; maxFID.Value = b; minVID.Value = c; minFID.Value = d; ActivateSensor(maxVID); ActivateSensor(maxFID); ActivateSensor(minVID); ActivateSensor(minFID); var cvid = Bitmask.GetValue(eax, 0, 7); var cfid = Bitmask.GetValue(eax, 8, 15); _CurrentFID = new Sensor("Current FID", 51205, SensorType.Factor, this, settings); _CurrentVID = new Sensor("Current VID", 51206, SensorType.Factor, this, settings); _CurrentFID.Value = cfid; _CurrentVID.Value = cvid; ActivateSensor(_CurrentFID); ActivateSensor(_CurrentVID); } this.TjMaxSensor = new Sensor("TjMax", 51201, SensorType.Temperature, this, settings); ActivateSensor(TjMaxSensor); } Update(); }
public IntelCPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(processorIndex, cpuid, settings) { // set tjMax float[] tjMax; switch (family) { case 0x06: { switch (model) { case 0x0F: // Intel Core 2 (65nm) microarchitecture = Microarchitecture.Core; switch (stepping) { case 0x06: // B2 switch (coreCount) { case 2: tjMax = Floats(80 + 10); break; case 4: tjMax = Floats(90 + 10); break; default: tjMax = Floats(85 + 10); break; } tjMax = Floats(80 + 10); break; case 0x0B: // G0 tjMax = Floats(90 + 10); break; case 0x0D: // M0 tjMax = Floats(85 + 10); break; default: tjMax = Floats(85 + 10); break; } break; case 0x17: // Intel Core 2 (45nm) microarchitecture = Microarchitecture.Core; tjMax = Floats(100); break; case 0x1C: // Intel Atom (45nm) microarchitecture = Microarchitecture.Atom; switch (stepping) { case 0x02: // C0 tjMax = Floats(90); break; case 0x0A: // A0, B0 tjMax = Floats(100); break; default: tjMax = Floats(90); break; } break; case 0x1A: // Intel Core i7 LGA1366 (45nm) case 0x1E: // Intel Core i5, i7 LGA1156 (45nm) case 0x1F: // Intel Core i5, i7 case 0x25: // Intel Core i3, i5, i7 LGA1156 (32nm) case 0x2C: // Intel Core i7 LGA1366 (32nm) 6 Core case 0x2E: // Intel Xeon Processor 7500 series (45nm) case 0x2F: // Intel Xeon Processor (32nm) microarchitecture = Microarchitecture.Nehalem; tjMax = GetTjMaxFromMSR(); break; case 0x2A: // Intel Core i5, i7 2xxx LGA1155 (32nm) case 0x2D: // Next Generation Intel Xeon, i7 3xxx LGA2011 (32nm) microarchitecture = Microarchitecture.SandyBridge; tjMax = GetTjMaxFromMSR(); break; case 0x3A: // Intel Core i5, i7 3xxx LGA1155 (22nm) microarchitecture = Microarchitecture.IvyBridge; tjMax = GetTjMaxFromMSR(); break; default: microarchitecture = Microarchitecture.Unknown; tjMax = Floats(100); break; } } break; case 0x0F: { switch (model) { case 0x00: // Pentium 4 (180nm) case 0x01: // Pentium 4 (130nm) case 0x02: // Pentium 4 (130nm) case 0x03: // Pentium 4, Celeron D (90nm) case 0x04: // Pentium 4, Pentium D, Celeron D (90nm) case 0x06: // Pentium 4, Pentium D, Celeron D (65nm) microarchitecture = Microarchitecture.NetBurst; tjMax = Floats(100); break; default: microarchitecture = Microarchitecture.Unknown; tjMax = Floats(100); break; } } break; default: microarchitecture = Microarchitecture.Unknown; tjMax = Floats(100); break; } // set timeStampCounterMultiplier switch (microarchitecture) { case Microarchitecture.NetBurst: case Microarchitecture.Atom: case Microarchitecture.Core: { uint eax, edx; if (Ring0.Rdmsr(IA32_PERF_STATUS, out eax, out edx)) { timeStampCounterMultiplier = ((edx >> 8) & 0x1f) + 0.5 * ((edx >> 14) & 1); } } break; case Microarchitecture.Nehalem: case Microarchitecture.SandyBridge: case Microarchitecture.IvyBridge: { uint eax, edx; if (Ring0.Rdmsr(MSR_PLATFORM_INFO, out eax, out edx)) { timeStampCounterMultiplier = (eax >> 8) & 0xff; } } break; default: timeStampCounterMultiplier = 0; break; } // check if processor supports a digital thermal sensor at core level if (cpuid[0][0].Data.GetLength(0) > 6 && (cpuid[0][0].Data[6, 0] & 1) != 0 && microarchitecture != Microarchitecture.Unknown) { coreTemperatures = new Sensor[coreCount]; for (int i = 0; i < coreTemperatures.Length; i++) { coreTemperatures[i] = new Sensor(CoreString(i), i, SensorType.Temperature, this, new[] { new ParameterDescription( "TjMax [°C]", "TjMax temperature of the core sensor.\n" + "Temperature = TjMax - TSlope * Value.", tjMax[i]), new ParameterDescription("TSlope [°C]", "Temperature slope of the digital thermal sensor.\n" + "Temperature = TjMax - TSlope * Value.", 1)}, settings); ActivateSensor(coreTemperatures[i]); } } else { coreTemperatures = new Sensor[0]; } // check if processor supports a digital thermal sensor at package level if (cpuid[0][0].Data.GetLength(0) > 6 && (cpuid[0][0].Data[6, 0] & 0x40) != 0 && microarchitecture != Microarchitecture.Unknown) { packageTemperature = new Sensor("CPU Package", coreTemperatures.Length, SensorType.Temperature, this, new[] { new ParameterDescription( "TjMax [°C]", "TjMax temperature of the package sensor.\n" + "Temperature = TjMax - TSlope * Value.", tjMax[0]), new ParameterDescription("TSlope [°C]", "Temperature slope of the digital thermal sensor.\n" + "Temperature = TjMax - TSlope * Value.", 1)}, settings); ActivateSensor(packageTemperature); } busClock = new Sensor("Bus Speed", 0, SensorType.Clock, this, settings); coreClocks = new Sensor[coreCount]; for (int i = 0; i < coreClocks.Length; i++) { coreClocks[i] = new Sensor(CoreString(i), i + 1, SensorType.Clock, this, settings); if (HasTimeStampCounter && microarchitecture != Microarchitecture.Unknown) ActivateSensor(coreClocks[i]); } if (microarchitecture == Microarchitecture.SandyBridge || microarchitecture == Microarchitecture.IvyBridge) { powerSensors = new Sensor[energyStatusMSRs.Length]; lastEnergyTime = new DateTime[energyStatusMSRs.Length]; lastEnergyConsumed = new uint[energyStatusMSRs.Length]; uint eax, edx; if (Ring0.Rdmsr(MSR_RAPL_POWER_UNIT, out eax, out edx)) energyUnitMultiplier = 1.0f / (1 << (int)((eax >> 8) & 0x1FF)); if (energyUnitMultiplier != 0) { for (int i = 0; i < energyStatusMSRs.Length; i++) { if (!Ring0.Rdmsr(energyStatusMSRs[i], out eax, out edx)) continue; lastEnergyTime[i] = DateTime.UtcNow; lastEnergyConsumed[i] = eax; powerSensors[i] = new Sensor(powerSensorLabels[i], i, SensorType.Power, this, settings); ActivateSensor(powerSensors[i]); } } } Update(); }
public void UpdateSensors() { var node = Nodes[0]; if (node == null) { return; } Core core = node.Cores[0]; if (core == null) { return; } CPUID cpu = core.Threads[0]; if (cpu == null) { return; } uint eax, edx; ulong mask = Ring0.ThreadAffinitySet(1UL << cpu.Thread); // MSRC001_0299 // TU [19:16] // ESU [12:8] -> Unit 15.3 micro Joule per increment // PU [3:0] Ring0.Rdmsr(MSR_PWR_UNIT, out eax, out edx); int tu = (int)((eax >> 16) & 0xf); int esu = (int)((eax >> 12) & 0xf); int pu = (int)(eax & 0xf); // MSRC001_029B // total_energy [31:0] DateTime sample_time = DateTime.Now; Ring0.Rdmsr(MSR_PKG_ENERGY_STAT, out eax, out edx); uint total_energy = eax; // THM_TCON_CUR_TMP // CUR_TEMP [31:21] uint temperature = 0; Ring0.WritePciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER, F17H_M01H_THM_TCON_CUR_TMP); Ring0.ReadPciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER + 4, out temperature); // SVI0_TFN_PLANE0 [0] // SVI0_TFN_PLANE1 [1] uint smusvi0_tfn = 0; Ring0.WritePciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER, F17H_M01H_SVI + 0x8); Ring0.ReadPciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER + 4, out smusvi0_tfn); // SVI0_PLANE0_VDDCOR [24:16] // SVI0_PLANE0_IDDCOR [7:0] uint smusvi0_tel_plane0 = 0; Ring0.WritePciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER, F17H_M01H_SVI + 0xc); Ring0.ReadPciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER + 4, out smusvi0_tel_plane0); // SVI0_PLANE1_VDDCOR [24:16] // SVI0_PLANE1_IDDCOR [7:0] uint smusvi0_tel_plane1 = 0; Ring0.WritePciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER, F17H_M01H_SVI + 0x10); Ring0.ReadPciConfig(Ring0.GetPciAddress(0, 0, 0), FAMILY_17H_PCI_CONTROL_REGISTER + 4, out smusvi0_tel_plane1); Ring0.ThreadAffinitySet(mask); // power consumption // power.Value = (float) ((double)pu * 0.125); // esu = 15.3 micro Joule per increment if (_lastPwrTime.Ticks == 0) { _lastPwrTime = sample_time; _lastPwrValue = total_energy; } // ticks diff TimeSpan time = sample_time - _lastPwrTime; long pwr; if (_lastPwrValue <= total_energy) { pwr = total_energy - _lastPwrValue; } else { pwr = (0xffffffff - _lastPwrValue) + total_energy; } // update for next sample _lastPwrTime = sample_time; _lastPwrValue = total_energy; double energy = 15.3e-6 * pwr; energy /= time.TotalSeconds; _packagePower.Value = (float)energy; // current temp Bit [31:21] //If bit 19 of the Temperature Control register is set, there is an additional offset of 49 degrees C. bool temp_offset_flag = false; if ((temperature & F17H_TEMP_OFFSET_FLAG) != 0) { temp_offset_flag = true; } temperature = (temperature >> 21) * 125; float offset = 0.0f; if (cpu.Name != null && (cpu.Name.Contains("2600X") || cpu.Name.Contains("2700X"))) { offset = -10.0f; } if (cpu.Name != null && (cpu.Name.Contains("1600X") || cpu.Name.Contains("1700X") || cpu.Name.Contains("1800X"))) { offset = -20.0f; } else if (cpu.Name != null && (cpu.Name.Contains("1920X") || cpu.Name.Contains("1950X") || cpu.Name.Contains("1900X"))) { offset = -27.0f; } else if (cpu.Name != null && (cpu.Name.Contains("1910") || cpu.Name.Contains("1920") || cpu.Name.Contains("1950"))) { offset = -10.0f; } float t = (temperature * 0.001f); if (temp_offset_flag) { t += -49.0f; } _coreTemperatureTctl.Value = t; _coreTemperatureTdie.Value = t + offset; // voltage double VIDStep = 0.00625; double vcc; uint svi0_plane_x_vddcor; uint svi0_plane_x_iddcor; //Core if ((smusvi0_tfn & 0x01) == 0) { svi0_plane_x_vddcor = (smusvi0_tel_plane0 >> 16) & 0xff; svi0_plane_x_iddcor = smusvi0_tel_plane0 & 0xff; vcc = 1.550 - (double)VIDStep * svi0_plane_x_vddcor; _coreVoltage.Value = (float)vcc; } // SoC // not every zen cpu has this voltage if ((smusvi0_tfn & 0x02) == 0) { svi0_plane_x_vddcor = (smusvi0_tel_plane1 >> 16) & 0xff; svi0_plane_x_iddcor = smusvi0_tel_plane1 & 0xff; vcc = 1.550 - (double)VIDStep * svi0_plane_x_vddcor; _socVoltage.Value = (float)vcc; _hw.ActivateSensor(_socVoltage); } }
public void UpdateSensors() { // CPUID cpu = threads.FirstOrDefault(); CPUID cpu = Threads[0]; if (cpu == null) { return; } uint eax, edx; ulong mask = Ring0.ThreadAffinitySet(1UL << cpu.Thread); // MSRC001_0299 // TU [19:16] // ESU [12:8] -> Unit 15.3 micro Joule per increment // PU [3:0] Ring0.Rdmsr(MSR_PWR_UNIT, out eax, out edx); int tu = (int)((eax >> 16) & 0xf); int esu = (int)((eax >> 12) & 0xf); int pu = (int)(eax & 0xf); // MSRC001_029A // total_energy [31:0] DateTime sample_time = DateTime.Now; Ring0.Rdmsr(MSR_CORE_ENERGY_STAT, out eax, out edx); uint total_energy = eax; // MSRC001_0293 // CurHwPstate [24:22] // CurCpuVid [21:14] // CurCpuDfsId [13:8] // CurCpuFid [7:0] Ring0.Rdmsr(MSR_HARDWARE_PSTATE_STATUS, out eax, out edx); int CurHwPstate = (int)((eax >> 22) & 0x3); int CurCpuVid = (int)((eax >> 14) & 0xff); int CurCpuDfsId = (int)((eax >> 8) & 0x3f); int CurCpuFid = (int)(eax & 0xff); // MSRC001_0064 + x // IddDiv [31:30] // IddValue [29:22] // CpuVid [21:14] // CpuDfsId [13:8] // CpuFid [7:0] // Ring0.Rdmsr(MSR_PSTATE_0 + (uint)CurHwPstate, out eax, out edx); // int IddDiv = (int)((eax >> 30) & 0x03); // int IddValue = (int)((eax >> 22) & 0xff); // int CpuVid = (int)((eax >> 14) & 0xff); Ring0.ThreadAffinitySet(mask); // clock // CoreCOF is (Core::X86::Msr::PStateDef[CpuFid[7:0]] / Core::X86::Msr::PStateDef[CpuDfsId]) * 200 _clock.Value = (float)((double)CurCpuFid / (double)CurCpuDfsId * 200.0); // multiplier _multiplier.Value = (float)((double)CurCpuFid / (double)CurCpuDfsId * 2.0); // Voltage double VIDStep = 0.00625; double vcc = 1.550 - (double)VIDStep * CurCpuVid; _vcore.Value = (float)vcc; // power consumption // power.Value = (float) ((double)pu * 0.125); // esu = 15.3 micro Joule per increment if (_lastPwrTime.Ticks == 0) { _lastPwrTime = sample_time; _lastPwrValue = total_energy; } // ticks diff TimeSpan time = sample_time - _lastPwrTime; long pwr; if (_lastPwrValue <= total_energy) { pwr = total_energy - _lastPwrValue; } else { pwr = (0xffffffff - _lastPwrValue) + total_energy; } // update for next sample _lastPwrTime = sample_time; _lastPwrValue = total_energy; double energy = 15.3e-6 * pwr; energy /= time.TotalSeconds; _power.Value = (float)energy; }
public GenericCPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(cpuid[0][0].Name, CreateIdentifier(cpuid[0][0].Vendor, processorIndex), settings) { this.cpuid = cpuid; this.vendor = cpuid[0][0].Vendor; this.family = cpuid[0][0].Family; this.model = cpuid[0][0].Model; this.stepping = cpuid[0][0].Stepping; this.processorIndex = processorIndex; this.coreCount = cpuid.Length; // check if processor has MSRs if (cpuid[0][0].Data.GetLength(0) > 1 && (cpuid[0][0].Data[1, 3] & 0x20) != 0) hasModelSpecificRegisters = true; else hasModelSpecificRegisters = false; // check if processor has a TSC if (cpuid[0][0].Data.GetLength(0) > 1 && (cpuid[0][0].Data[1, 3] & 0x10) != 0) hasTimeStampCounter = true; else hasTimeStampCounter = false; // check if processor supports an invariant TSC if (cpuid[0][0].ExtData.GetLength(0) > 7 && (cpuid[0][0].ExtData[7, 3] & 0x100) != 0) isInvariantTimeStampCounter = true; else isInvariantTimeStampCounter = false; if (coreCount > 1) totalLoad = new Sensor("CPU Total", 0, SensorType.Load, this, settings); else totalLoad = null; coreLoads = new Sensor[coreCount]; for (int i = 0; i < coreLoads.Length; i++) coreLoads[i] = new Sensor(CoreString(i), i + 1, SensorType.Load, this, settings); cpuLoad = new CPULoad(cpuid); if (cpuLoad.IsAvailable) { foreach (Sensor sensor in coreLoads) ActivateSensor(sensor); if (totalLoad != null) ActivateSensor(totalLoad); } if (hasTimeStampCounter) { ulong mask = ThreadAffinity.Set(1UL << cpuid[0][0].Thread); EstimateTimeStampCounterFrequency( out estimatedTimeStampCounterFrequency, out estimatedTimeStampCounterFrequencyError); ThreadAffinity.Set(mask); } else { estimatedTimeStampCounterFrequency = 0; } timeStampCounterFrequency = estimatedTimeStampCounterFrequency; }
public AMD10CPU(int processorIndex, CPUID[][] cpuid, ISettings settings) : base(processorIndex, cpuid, settings) { // AMD family 1Xh processors support only one temperature sensor coreTemperature = new Sensor( "Core" + (coreCount > 1 ? " #1 - #" + coreCount : ""), 0, SensorType.Temperature, this, new [] { new ParameterDescription("Offset [°C]", "Temperature offset.", 0) }, settings); switch (family) { case 0x10: miscellaneousControlDeviceId = FAMILY_10H_MISCELLANEOUS_CONTROL_DEVICE_ID; break; case 0x11: miscellaneousControlDeviceId = FAMILY_11H_MISCELLANEOUS_CONTROL_DEVICE_ID; break; case 0x12: miscellaneousControlDeviceId = FAMILY_12H_MISCELLANEOUS_CONTROL_DEVICE_ID; break; case 0x14: miscellaneousControlDeviceId = FAMILY_14H_MISCELLANEOUS_CONTROL_DEVICE_ID; break; case 0x15: switch (model & 0xF0) { case 0x00: miscellaneousControlDeviceId = FAMILY_15H_MODEL_00_MISC_CONTROL_DEVICE_ID; break; case 0x10: miscellaneousControlDeviceId = FAMILY_15H_MODEL_10_MISC_CONTROL_DEVICE_ID; break; default: miscellaneousControlDeviceId = 0; break; } break; case 0x16: switch (model & 0xF0) { case 0x00: miscellaneousControlDeviceId = FAMILY_16H_MODEL_00_MISC_CONTROL_DEVICE_ID; break; default: miscellaneousControlDeviceId = 0; break; } break; default: miscellaneousControlDeviceId = 0; break; } // get the pci address for the Miscellaneous Control registers miscellaneousControlAddress = GetPciAddress( MISCELLANEOUS_CONTROL_FUNCTION, miscellaneousControlDeviceId); busClock = new Sensor("Bus Speed", 0, SensorType.Clock, this, settings); coreClocks = new Sensor[coreCount]; for (int i = 0; i < coreClocks.Length; i++) { coreClocks[i] = new Sensor(CoreString(i), i + 1, SensorType.Clock, this, settings); if (HasTimeStampCounter) ActivateSensor(coreClocks[i]); } corePerformanceBoostSupport = (cpuid[0][0].ExtData[7, 3] & (1 << 9)) > 0; // set affinity to the first thread for all frequency estimations ulong mask = ThreadAffinity.Set(1UL << cpuid[0][0].Thread); // disable core performance boost uint hwcrEax, hwcrEdx; Ring0.Rdmsr(HWCR, out hwcrEax, out hwcrEdx); if (corePerformanceBoostSupport) Ring0.Wrmsr(HWCR, hwcrEax | (1 << 25), hwcrEdx); uint ctlEax, ctlEdx; Ring0.Rdmsr(PERF_CTL_0, out ctlEax, out ctlEdx); uint ctrEax, ctrEdx; Ring0.Rdmsr(PERF_CTR_0, out ctrEax, out ctrEdx); timeStampCounterMultiplier = estimateTimeStampCounterMultiplier(); // restore the performance counter registers Ring0.Wrmsr(PERF_CTL_0, ctlEax, ctlEdx); Ring0.Wrmsr(PERF_CTR_0, ctrEax, ctrEdx); // restore core performance boost if (corePerformanceBoostSupport) Ring0.Wrmsr(HWCR, hwcrEax, hwcrEdx); // restore the thread affinity. ThreadAffinity.Set(mask); // the file reader for lm-sensors support on Linux temperatureStream = null; int p = (int)Environment.OSVersion.Platform; if ((p == 4) || (p == 128)) { string[] devicePaths = Directory.GetDirectories("/sys/class/hwmon/"); foreach (string path in devicePaths) { string name = null; try { using (StreamReader reader = new StreamReader(path + "/device/name")) name = reader.ReadLine(); } catch (IOException) { } switch (name) { case "k10temp": temperatureStream = new FileStream(path + "/device/temp1_input", FileMode.Open, FileAccess.Read, FileShare.ReadWrite); break; } } } Update(); }