new public bool is_row_hit(Req req)
{
MemCtrl2 mctrl = get_mctrl(req);
Bank2 bank = mctrl.chan.ranks[req.addr.rid].banks[req.addr.bid];
return(bank.curr_rowid == (long)req.addr.rowid);
}
//constructor
public Bank2(MemCtrl2 mc, Rank2 rank, uint bid)
{
this.cid = mc.cid;
this.rid = rank.rid;
this.bid = bid;
this.mc = mc;
curr_rowid = -1; //closed-row
}
//omniscient
public MetaMemCtrl2(MemCtrl2[] mctrls, MemSched2 sched, MemSched2 wbsched)
{
is_omniscient = true;
this.mctrl = null;
this.mctrls = mctrls;
this.sched = sched;
this.wbsched = wbsched;
set_banks();
}
//non-omniscient
public MetaMemCtrl2(MemCtrl2 mctrl, MemSched2 sched, MemSched2 wbsched)
{
is_omniscient = false;
this.mctrl = mctrl;
this.mctrls = new MemCtrl2[] { mctrl };
this.sched = sched;
this.wbsched = wbsched;
set_banks();
}
//constructor
public Channel2(MemCtrl2 mc, uint rmax, uint bmax)
{
this.cid = mc.cid;
this.mc = mc;
this.rmax = rmax;
ranks = new Rank2[rmax];
for (uint i = 0; i < ranks.Length; i++)
{
ranks[i] = new Rank2(mc, this, i, bmax);
}
}
public Req get_curr_req(Bank2 bank)
{
MemCtrl2 mc = bank.mc;
List <Req> inflight_q = mc.inflightqs[bank.rid, bank.bid];
if (inflight_q.Count == 0)
{
return(null);
}
return(inflight_q[inflight_q.Count - 1]);
}
//constructor
public Rank2(MemCtrl2 mc, Channel2 chan, uint rid, uint bmax)
{
this.cid = mc.cid;
this.rid = rid;
this.mc = mc;
this.bmax = bmax;
banks = new Bank2[bmax];
for (uint i = 0; i < banks.Length; i++)
{
banks[i] = new Bank2(mc, this, i);
}
}
public static void UpdateDict(Dictionary <ulong, AccessInfo> dict, Req req, MemCtrl2 mctrl)
{//Need to update NVM dictionary when a request comes out of L2
//Need to update both dictionary when a request
AccessInfo temp;
if (!dict.ContainsKey(KeyGen(req)))
{//If dictionary does not have this record
temp.ReadMiss = 0;
temp.WriteMiss = 0;
temp.ReadHit = 0;
temp.WriteHit = 0;
temp.Access = 1;
temp.ReadMLPnum = 1;
temp.WriteMLPnum = 1;
temp.ReadMLPAcc = 0;
temp.ReadMLPTimes = 0;
temp.WriteMLPAcc = 0;
temp.WriteMLPTimes = 0;
temp.pid = req.pid;
temp.addlist = false;
//not in the dictionary means a cold miss
if (req.type == ReqType.RD)
{
temp.ReadMiss++;
}
else
{
temp.WriteMiss++;
}
dict.Add(KeyGen(req), temp);
DramLookUp.Add(KeyGen(req));
}
else
{//If dictionary has this record
temp = dict[KeyGen(req)];
temp.Access++;
RowHitFinder2 rhf = new RowHitFinder2(mctrl);
if (rhf.is_row_hit(req)) // a hit
{
if (req.type == ReqType.RD)
{
temp.ReadHit++;
}
else
{
temp.WriteHit++;
}
}
else
{
if (req.type == ReqType.RD)
{
temp.ReadMiss++;
}
else
{
temp.WriteMiss++;
}
}
dict[KeyGen(req)] = temp;
}
}
public List <Req> get_writeq(Bank2 bank)
{
MemCtrl2 mc = get_mctrl(bank);
return(mc.writeqs[bank.rid, bank.bid]);
}
public List <Req> get_readq(Bank2 bank)
{
MemCtrl2 mc = get_mctrl(bank);
return(mc.readqs[bank.rid, bank.bid]);
}
public RowHitFinder2(MemCtrl2 mctrl)
{
this.mctrl = mctrl;
}
protected bool is_readq_empty(uint cid)
{
MemCtrl2 mctrl = mctrls[cid];
return(mctrl.rload == 0);
}
protected bool is_writeq_full(uint cid)
{
MemCtrl2 mctrl = mctrls[cid];
return(mctrl.mctrl_writeq.Capacity == mctrl.wload);
}
protected bool is_writeq_empty(uint cid)
{
MemCtrl2 mctrl = mctrls[cid];
return(mctrl.wload == 0);
}
public DRAMTrueLRU()
{
this.sets = Config.proc.cache_sets;
this.ways = Config.proc.cache_ways;
this.latency = Config.proc.cache_latency;
data = new TagEntry[sets][];
reqs = new Queue <Req>();
wbs = new Queue <Req>();
DDR3DRAM ddr3 = new DDR3DRAM(Config.mem2.ddr3_type, Config.mem2.clock_factor, Config.mem2.tWR, Config.mem2.tWTR);
uint cmax = (uint)Config.mem2.channel_max;
uint rmax = (uint)Config.mem2.rank_max;
//memory controllers
mctrls2 = new MemCtrl2[Config.mem2.mctrl_num][];
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
mctrls2[n] = new MemCtrl2[cmax];
for (int i = 0; i < mctrls2[n].Length; i++)
{
mctrls2[n][i] = new MemCtrl2(rmax, ddr3);
}
}
//memory schedulers and metamemory controllers
if (!Config.sched.is_omniscient)
{
MemSched2[][] scheds = new MemSched2[Config.mem2.mctrl_num][];
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
scheds[n] = new MemSched2[cmax];
for (int i = 0; i < cmax; i++)
{
scheds[n][i] = Activator.CreateInstance(Config.sched.typeof_sched_algo2) as MemSched2;
}
}
MemSched2[][] wbscheds = new MemSched2[Config.mem2.mctrl_num][];
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
wbscheds[n] = new MemSched2[cmax];
if (!Config.sched.same_sched_algo)
{
for (int i = 0; i < cmax; i++)
{
wbscheds[n][i] = Activator.CreateInstance(Config.sched.typeof_wbsched_algo2) as MemSched2;
}
}
else
{
for (int i = 0; i < cmax; i++)
{
wbscheds[n][i] = scheds[n][i];
}
}
}
MetaMemCtrl2[][] meta_mctrls2 = new MetaMemCtrl2[Config.mem2.mctrl_num][];
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
meta_mctrls2[n] = new MetaMemCtrl2[cmax];
for (int i = 0; i < cmax; i++)
{
meta_mctrls2[n][i] = new MetaMemCtrl2(mctrls2[n][i], scheds[n][i], wbscheds[n][i]);
mctrls2[n][i].meta_mctrl = meta_mctrls2[n][i];
scheds[n][i].meta_mctrl = meta_mctrls2[n][i];
scheds[n][i].initialize();
wbscheds[n][i].meta_mctrl = meta_mctrls2[n][i];
wbscheds[n][i].initialize();
}
}
}
else
{
MemSched2[] sched = new MemSched2[Config.mem2.mctrl_num];
MemSched2[] wbsched = new MemSched2[Config.mem2.mctrl_num];
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
sched[n] = Activator.CreateInstance(Config.sched.typeof_sched_algo2) as MemSched2;
if (!Config.sched.same_sched_algo)
{
wbsched[n] = Activator.CreateInstance(Config.sched.typeof_wbsched_algo2) as MemSched2;
}
else
{
wbsched[n] = sched[n];
}
}
MetaMemCtrl2[] meta_mctrl = new MetaMemCtrl2[Config.mem2.mctrl_num];
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
meta_mctrl[n] = new MetaMemCtrl2(mctrls2[n], sched[n], wbsched[n]);
for (int i = 0; i < cmax; i++)
{
mctrls2[n][i].meta_mctrl = meta_mctrl[n];
}
sched[n].meta_mctrl = meta_mctrl[n];
sched[n].initialize();
wbsched[n].meta_mctrl = meta_mctrl[n];
wbsched[n].initialize();
}
}
//wbmode
for (int n = 0; n < Config.mem2.mctrl_num; n++)
{
Console.WriteLine(Config.mctrl.typeof_wbmode_algo);
mwbmode = Activator.CreateInstance(Config.mctrl.typeof_wbmode_algo2, new Object[] { mctrls2[n] }) as MemWBMode2;
for (int i = 0; i < cmax; i++)
{
mctrls2[n][i].mwbmode = mwbmode;
}
//blp tracker
blptracker = new BLPTracker2(mctrls2[n]);
}
for (int set = 0; set < sets; set++)
{
data[set] = new TagEntry[ways];
for (int way = 0; way < ways; way++)
{
data[set][way] = new TagEntry();
data[set][way].valid = false;
data[set][way].addr = 0x0;
data[set][way].access = 0;
// data[set][way].dirty = false;
data[set][way].pid = -1;
data[set][way].block_valid = new bool[Config.proc.page_block_diff];
data[set][way].block_dirty = new bool[Config.proc.page_block_diff];
for (int block_id = 0; block_id < Config.proc.page_block_diff; block_id++)
{
data[set][way].block_valid[block_id] = false;
data[set][way].block_dirty[block_id] = false;
}
}
}
}