static void Main(string[] args) { Testbench_XilinxAdderSubtracter tb = new Testbench_XilinxAdderSubtracter(); DesignContext.Instance.Elaborate(); DesignContext.Instance.Simulate(100 * Testbench_XilinxAdderSubtracter.ClockPeriod); //DesignContext.Instance.Simulate(10 * (Testbench_zaehler.DataWidth + 3) * Testbench_zaehler.ClockPeriod); // Now convert the design to VHDL and embed it into a Xilinx ISE project XilinxProject project = new XilinxProject(@".\hdl_output", "XilinxAdderSubtracter"); project.PutProperty(EXilinxProjectProperties.DeviceFamily, EDeviceFamily.Spartan3); project.PutProperty(EXilinxProjectProperties.Device, EDevice.xc3s1500l); project.PutProperty(EXilinxProjectProperties.Package, EPackage.fg676); project.PutProperty(EXilinxProjectProperties.SpeedGrade, ESpeedGrade._4); project.PutProperty(EXilinxProjectProperties.PreferredLanguage, EHDL.VHDL); VHDLGenerator codeGen = new VHDLGenerator(); SynthesisEngine.Create(DesignContext.Instance, project).Synthesize(codeGen); project.Save(); }