コード例 #1
0
 /// <summary>
 /// OpCodeName = "LD",
 /// Param1Type = AddressingMode.Indexed,
 /// Param2Type = AddressingMode.Immediate,
 /// Equation = "(IX+d) <- n",
 /// Param1List = "(IX+d)","(IY+d)"
 /// Param2List = "n"
 /// UserManualPage = "90\n91",
 /// Description = "The n operand is loaded to the memory address specified by the sum of the\nIndex Register IX and the two�s complement displacement operand d.",
 /// ConditionBitsAffected = "None",
 /// Example = "If the Index Register IX contains the number 219AH, the instruction\nLD (IX+5H), 5AH results in byte 5AH in the memory address 219FH."
 /// </summary>
 private void Instruction_71_LD_IndexedAddress_Number8(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
 {
     // MachineCycleType.OCF, TStates = 4
     // MachineCycleType.OD, TStates = 3
     if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
     {
         InternalDataBus_SendTo(InternalDataBusConnection.Z);
     }
     // MachineCycleType.OD, TStates = 5
     if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 5)
     {
         InternalDataBus_SendTo(InternalDataBusConnection.ALURightBuffer);
     }
     if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 7)
     {
         InternalDataBus_SampleFrom(InternalDataBusConnection.Z);
     }
     if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 9)
     {
         InternalAddressBus_SampleFrom(RegisterUtils.GetFromAddressIndexBase((AddressIndexBase)instructionOrigin.OpCode.Param1));
         InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
         InternalAddressBus_SampleFromRegisterWZPlusDisplacement();
     }
     // MachineCycleType.MW, TStates = 3
     if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 0)
     {
         InternalDataBus_SampleFrom(InternalDataBusConnection.ALURightBuffer);
     }
 }
コード例 #2
0
 /// <summary>
 /// OpCodeName = "LD",
 /// Param1Type = AddressingMode.Register,
 /// Param2Type = AddressingMode.Indexed,
 /// Equation = "r <- (IX+d)",
 /// Param1List = new string[] { "A","B","C","D","E","H","L" },
 /// Param2List = new string[] { "(IX+d)","(IY+d)" },
 /// UserManualPage = "84\n85",
 /// Description = "The operand (IX+d), (the contents of the Index Register IX summed with\na two�s complement displacement integer d) is loaded to register r, where r identifies register A, B, C, D, E, H, or L.",
 /// ConditionBitsAffected = "None",
 /// Example = "If the Index Register IX contains the number 25AFH, the instruction LD B,\n(IX+19H) causes the calculation of the sum 25AFH + 19H, which points\nto memory location 25C8H. If this address contains byte 39H, the\ninstruction results in register B also containing 39H."
 /// </summary>
 private void Instruction_63_LD_Register_IndexedAddress(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
 {
     // MachineCycleType.OCF, TStates = 4
     // MachineCycleType.OD, TStates = 3
     // MachineCycleType.CPU, TStates = 5
     if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 9)
     {
         InternalAddressBus_SampleFrom(RegisterUtils.GetFromAddressIndexBase((AddressIndexBase)instructionOrigin.OpCode.Param2));
         InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
         InternalAddressBus_SampleFromRegisterWZPlusDisplacement();
     }
     // MachineCycleType.MR, TStates = 3
     if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 5)
     {
         InternalDataBus_SendTo((Register)instructionOrigin.OpCode.Param1);
     }
 }
 /// <summary>
 /// OpCodeName = "BIT",
 /// Param1Type = AddressingMode.Bit,
 /// Param2Type = AddressingMode.Indexed,
 /// Equation = "Z <- (IX+d)b",
 /// Param1List = "0","1","2","3","4","5","6","7"
 /// Param2List = "(IX+d)","(IY+d)"
 /// UserManualPage = "228\n230",
 /// Description = "This instruction tests bit b in the memory location specified by the contents\nof register pair IX combined with the two's complement displacement d\nand sets the Z flag accordingly.",
 /// ConditionBitsAffected = "S is unknown\nZ is set if specified Bit is 0, reset otherwise\nH is set\nP/V is unknown\nN is reset\nC is not affected",
 /// Example = "If the contents of Index Register IX are 2000H, and bit 6 in memory\nlocation 2004H contains 1, at execution of BIT 6, (IX+4H) the Z flag in\nthe F register contains 0, and bit 6 in memory location 2004H still contains\n1. Bit 0 in memory location 2004H is the least-significant bit."
 /// </summary>
 private void Instruction_17_BIT_Bit_IndexedAddress(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
 {
     // MachineCycleType.OCF, TStates = 4
     // MachineCycleType.MR, TStates = 4
     if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 0)
     {
         InternalDataBus_SampleFrom(InternalDataBusConnection.W);
         InternalAddressBus_SampleFrom(RegisterUtils.GetFromAddressIndexBase((AddressIndexBase)instructionOrigin.OpCode.Param2));
         InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
         InternalAddressBus_SampleFromRegisterWZPlusDisplacement();
     }
     if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
     {
         InternalDataBus_SendTo(InternalDataBusConnection.ALURightBuffer);
     }
     if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 7)
     {
         BitTest(BitUtils.ToByte((Bit)instructionOrigin.OpCode.Param1), AddressingMode.Indexed);
     }
 }