internal Intel(PciDeviceConfig config, PciMemory ioMemory, string cardName, CardType cardType)
{
this.ioMemory = ioMemory;
this.cardName = cardName;
this.cardType = cardType;
//TODO: IoIrqRange iir = res.irq;
//TODO: irq = iir.IrqAtOffset(0);
rxRingBuffer = new IntelRxRingBuffer(MaxRxFragmentsInRing);
txRingBuffer = new IntelTxRingBuffer(MaxTxFragmentsInRing);
//PciDeviceConfig config = (PciDeviceConfig)IoConfig.GetConfig();
//this.pciConfig = config;
// DebugWriteLine("PCI Control {0:x8} Status {1:x8}",
// DebugStub.ArgList(config.Control, config.Status));
/*
* byte cap = config.Capabilities;
* while (cap != 0 && cap < 0xff) {
* DebugWriteLine("Capability at: {0:x2}", DebugStub.ArgList(cap));
* byte id = config.Read8(cap);
* if (id == 7) {
* DebugWriteLine("PCI-X Command {0:x4} Status {1:x8}",
* DebugStub.ArgList(
* config.Read16(cap + 2) & 0x3f,
* config.Read32(cap + 4)
* )
* );
* }
* else if (id == 5) {
* // MSI capability - only reached if enabled,
* // but usually present.
* DebugWriteLine("MSI Control {0:x4} Address {1:x8}.{2:x8} Data {3:x4}",
* DebugStub.ArgList(config.Read16(cap + 2),
* config.Read32(cap + 8),
* config.Read32(cap + 4),
* config.Read16(cap + 10)
* )
* );
* }
* else {
* DebugWriteLine("Unknown capability {0:x2}", DebugStub.ArgList(id));
* }
*
* cap = config.Read8(cap + 1);
* }
*/
eerdReg = new EerdRegister(config.DeviceId);
//DebugWriteLine("Irq {0}", DebugStub.ArgList(irq.Irq));
// Debug.Assert((config.Control & PciConfig.PCI_ENABLE_BUS_MASTER) != 0);
// Debug.Assert((config.Control & PciConfig.PCI_ENABLE_MEMORY_SPACE) != 0);
// DebugStub.Assert(config.InterruptsEnabled);
}
private Piix4Ata(PciDeviceConfig config)
{
DebugStub.Print("Piix4Ata Constructor\n");
}
