/// <summary>
/// Outputs the VHDL representation of a <code>VhdlElement</code> to a <code>Writer</code> using a custom code format.
/// </summary>
/// <param name="element">the VHDL element</param>
/// <param name="format">the custom code format</param>
/// <param name="writer">the <code>Writer</code></param>
public static void toWriter(VhdlElement element, IVhdlCodeFormat format, StreamWriter writer)
{
VhdlWriter vhdlWriter = new VhdlWriter(writer, format);
OutputModule output = new VhdlOutputModule(vhdlWriter);
output.writeVhdlElement(element);
}
public static void constantInterfaceSuffix(Constant constant, VhdlWriter writer, OutputModule output)
{
output.writeSubtypeIndication(constant.Type);
if (constant.DefaultValue != null)
{
writer.Append(" := ");
output.writeExpression(constant.DefaultValue);
}
}
//TODO: add mode
public static void variableInterfaceSuffix(Variable variable, VhdlWriter writer, OutputModule output)
{
output.writeSubtypeIndication(variable.Type);
if (variable.DefaultValue != null)
{
writer.Append(" := ");
output.writeExpression(variable.DefaultValue);
}
}
public static void handleAnnotationsAfter(VhdlElement element, VhdlWriter writer)
{
if (element == null)
{
return;
}
foreach (string comment in Comments.GetCommentsAfter(element))
{
writer.Append("--").Append(comment).NewLine();
}
}
internal VhdlOutputModule(VhdlWriter writer)
{
sequentialStatementVisitor = new VhdlSequentialStatementVisitor(writer, this);
concurrentStatementVisitor = new VhdlConcurrentStatementVisitor(writer, this);
libraryUnitVisitor = new VhdlLibraryUnitVisitor(writer, this);
declarationVisitor = new VhdlDeclarationVisitor(writer, this);
expressionVisitor = new VhdlExpressionVisitor(writer, this);
configurationVisitor = new VhdlConfigurationVisitor(writer, this);
typeVisitor = new VhdlTypeVisitor(writer, this);
miscellaneousElementOutput = new VhdlMiscellaneousElementOutput(writer, this);
nameVisitor = new VhdlNameVisitor(writer, this);
}
//TODO: write BUS keyword
public static void signalInterfaceSuffix(Signal signal, VhdlWriter writer, OutputModule output)
{
output.writeSubtypeIndication(signal.Type);
if (signal.Kind == Signal.KindEnum.BUS)
{
writer.Append(' ').Append(signal.Kind.ToString());
}
else if (signal.Kind == Signal.KindEnum.REGISTER)
{
throw new Exception("Signal kind register isn't allowed in an interface declaration");
}
if (signal.DefaultValue != null)
{
writer.Append(" := ");
output.writeExpression(signal.DefaultValue);
}
}
public static void interfaceSuffix(VhdlObject @object, VhdlWriter writer, OutputModule output)
{
if (@object is Signal)
{
signalInterfaceSuffix((Signal)@object, writer, output);
}
else if (@object is Constant)
{
constantInterfaceSuffix((Constant)@object, writer, output);
}
else if (@object is Variable)
{
variableInterfaceSuffix((Variable)@object, writer, output);
}
else if (@object is FileObject)
{
fileInterfaceSuffix((FileObject)@object, writer, output);
}
else
{
throw new ArgumentException("Unknown interface element.");
}
}
public VhdlConcurrentStatementVisitor(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}
public VhdlConfigurationVisitor(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}
public VhdlMiscellaneousElementOutput(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}
public static void fileInterfaceSuffix(FileObject file, VhdlWriter writer, OutputModule output)
{
output.writeSubtypeIndication(file.Type);
}
public VhdlExpressionVisitor(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}
public VhdlSequentialStatementVisitor(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}
public VhdlLibraryUnitVisitor(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}
public VhdlTypeVisitor(VhdlWriter writer, OutputModule output)
{
this.writer = writer;
this.output = output;
}