Esempio n. 1
0
        public static void RunTest()
        {
            DesignContext.Reset();

            TestHLS_VanDerPol_Testbench tb = new TestHLS_VanDerPol_Testbench();

            DesignContext.Instance.Elaborate();
            //DesignContext.Instance.Simulate(new Time(4.0, ETimeUnit.us));
            //DesignContext.Stop();
            XilinxIntegration.RegisterIPCores(DesignContext.Instance.Descriptor);
            DesignContext.Instance.CompleteAnalysis();

            XC6VLX240T_FF1156 fpga = new XC6VLX240T_FF1156()
            {
                SpeedGrade        = ESpeedGrade._2,
                TopLevelComponent = tb.DUT
            };

            fpga.Testbenches.Add(tb);
            fpga.Pins["J9"].Map(tb.DUT.Clk);
            fpga.Synthesize(@".\hdl_out_TestHLS_VanDerPol", "TestHLS_VanDerPol");
        }
        public static void RunTest()
        {
            DesignContext.Reset();

            TestHLS_VanDerPol_Testbench tb = new TestHLS_VanDerPol_Testbench();

            DesignContext.Instance.Elaborate();
            //DesignContext.Instance.Simulate(new Time(4.0, ETimeUnit.us));
            //DesignContext.Stop();
            XilinxIntegration.RegisterIPCores(DesignContext.Instance.Descriptor);
            DesignContext.Instance.CompleteAnalysis();

            XC6VLX240T_FF1156 fpga = new XC6VLX240T_FF1156()
            {
                SpeedGrade = ESpeedGrade._2,
                TopLevelComponent = tb.DUT
            };
            fpga.Testbenches.Add(tb);
            fpga.Pins["J9"].Map(tb.DUT.Clk);
            fpga.Synthesize(@".\hdl_out_TestHLS_VanDerPol", "TestHLS_VanDerPol");
        }
Esempio n. 3
0
        static void Main(string[] args)
        {
            Console.WriteLine("SystemSharp test cases");
            Console.WriteLine();

            try
            {
                Console.WriteLine("Part 1: Basic data structures");
                Console.WriteLine("  testing SystemSharp.Collections.EmilStefanov.DisjointSets");

                SystemSharp.Collections.EmilStefanov.Test.DisjointSetsTester.RunTests();

                Console.WriteLine("  testing fixed point math");

                TestFixPoint.RunTest();

                Console.WriteLine("Part 2: Design analysis and synthesis");

                TestDesign1.RunTest();
                TestRegPipe.RunTest();
                TestAddMul0.RunTest();
                TestAddMul1.RunTest();
                TestAddMul2.RunTest();
                Mod2TestDesign.Run();
                TestConcatTestbench.Run();

                Console.WriteLine("Part 3: Compiler");

                CompilerTest.Testbench.RunTest();

                Console.WriteLine("Part 4: Component tests");

                ALUTestDesign.Run();
                Mod2TestDesign.Run();
                Test_SinCosLUT_Testbench.RunTest();

                Console.WriteLine("Part 5: HLS");

                TestHLS_PortAccess_Testbench.RunTest();
                TestHLS_ALU_Testbench.RunTest();
                TestHLS_FPU_Testbench.RunTest();
                TestHLS_Cordic_Testbench.RunTest();
                TestHLS_CordicSqrt_Testbench.RunTest();
                TestHLS_CFlow_Testbench.RunTest();
                TestHLS_CFlow2_Testbench.RunTest();
                TestHLS_VanDerPol_Testbench.RunTest();
                TestHLSTestbench1.RunTest();
                TestHLS_SFixDiv.RunTest();
                TestHLS_SinCosLUT_Testbench.RunTest();

                Console.WriteLine("Part 6: File writing");
                FileWriterTestbench.RunTest();

                Console.WriteLine();
                Console.WriteLine("Test passed");
            }
            catch (Exception e)
            {
                Console.WriteLine("Test failed: " + e.Message);
            }
        }