public Tlcs90Rewriter(Tlcs90Architecture arch, EndianImageReader rdr, ProcessorState state, IStorageBinder binder, IRewriterHost host) { this.arch = arch; this.rdr = rdr; this.state = state; this.binder = binder; this.host = host; this.dasm = new Tlcs90Disassembler(arch, rdr).GetEnumerator(); this.instr = null !; this.m = null !; }
public IEnumerator <RtlInstructionCluster> GetEnumerator() { while (dasm.MoveNext()) { this.instr = dasm.Current; iclass = instr.InstructionClass; var instrs = new List <RtlInstruction>(); this.m = new RtlEmitter(instrs); switch (instr.Mnemonic) { default: EmitUnitTest(); Invalid(); host.Warn( instr.Address, string.Format( "TLCS-90 instruction '{0}' not supported yet.", instr.Mnemonic)); break; case Mnemonic.invalid: m.Invalid(); break; case Mnemonic.adc: RewriteAdcSbc(m.IAdd, "**-**V0*"); break; case Mnemonic.add: RewriteBinOp(m.IAdd, "**-***0*"); break; case Mnemonic.and: RewriteBinOp(m.And, "**-10*00"); break; case Mnemonic.bit: RewriteBit("*--I**0-"); break; case Mnemonic.call: RewriteCall(); break; case Mnemonic.callr: RewriteCall(); break; case Mnemonic.ccf: RewriteCcf(); break; case Mnemonic.cp: RewriteCp(); break; case Mnemonic.cpl: RewriteCpl("---1--1-"); break; case Mnemonic.daa: RewriteDaa(); break; case Mnemonic.dec: RewriteIncDec(m.ISub, false); break; case Mnemonic.decx: RewriteIncDec(m.ISub, true); break; case Mnemonic.di: RewriteDi(); break; case Mnemonic.div: RewriteDiv(); break; case Mnemonic.djnz: RewriteDjnz(); break; case Mnemonic.ei: RewriteEi(); break; case Mnemonic.ex: RewriteEx(); break; case Mnemonic.exx: RewriteExx(); break; case Mnemonic.halt: RewriteHalt(); break; case Mnemonic.inc: RewriteIncDec(m.IAdd, false); break; case Mnemonic.incw: RewriteIncwDecw(m.IAdd); break; case Mnemonic.incx: RewriteIncDec(m.IAdd, true); break; case Mnemonic.jp: RewriteJp(); break; case Mnemonic.jr: RewriteJp(); break; case Mnemonic.ld: RewriteLd(); break; case Mnemonic.ldar: RewriteLdar(); break; case Mnemonic.ldir: RewriteLdir("---0-00-"); break; case Mnemonic.ldw: RewriteLd(); break; case Mnemonic.mul: RewriteMul(); break; case Mnemonic.neg: RewriteNeg(); break; case Mnemonic.nop: m.Nop(); break; case Mnemonic.or: RewriteBinOp(m.Or, "**-00*00"); break; case Mnemonic.pop: RewritePop(); break; case Mnemonic.push: RewritePush(); break; case Mnemonic.rcf: RewriteRcf(); break; case Mnemonic.res: RewriteSetRes(false); break; case Mnemonic.ret: RewriteRet(); break; case Mnemonic.reti: RewriteReti(); break; case Mnemonic.rl: RewriteRotation(IntrinsicProcedure.RolC, true); break; case Mnemonic.rlc: RewriteRotation(IntrinsicProcedure.Rol, false); break; case Mnemonic.rr: RewriteRotation(IntrinsicProcedure.RorC, true); break; case Mnemonic.rrc: RewriteRotation(IntrinsicProcedure.Ror, false); break; case Mnemonic.sbc: RewriteAdcSbc(m.ISub, "**-**V1*"); break; case Mnemonic.scf: RewriteScf(); break; case Mnemonic.set: RewriteSetRes(true); break; case Mnemonic.tset: RewriteTset("*--I**0-"); break; case Mnemonic.sla: RewriteShift(m.Shl); break; case Mnemonic.sll: RewriteShift(m.Shl); break; case Mnemonic.sra: RewriteShift(m.Sar); break; case Mnemonic.srl: RewriteShift(m.Shr); break; case Mnemonic.sub: RewriteBinOp(m.ISub, "**-**V1*"); break; case Mnemonic.swi: RewriteSwi(); break; case Mnemonic.xor: RewriteBinOp(m.Xor, "**-10*00"); break; } yield return(m.MakeCluster(instr.Address, instr.Length, iclass)); } }
public IEnumerator <RtlInstructionCluster> GetEnumerator() { while (dasm.MoveNext()) { this.instr = dasm.Current; rtlc = RtlClass.Linear; var instrs = new List <RtlInstruction>(); this.m = new RtlEmitter(instrs); switch (instr.Opcode) { default: EmitUnitTest(); Invalid(); break; case Opcode.invalid: rtlc = RtlClass.Invalid; m.Invalid(); break; case Opcode.adc: RewriteAdcSbc(m.IAdd, "**-**V0*"); break; case Opcode.add: RewriteBinOp(m.IAdd, "**-***0*"); break; case Opcode.and: RewriteBinOp(m.And, "**-10*00"); break; case Opcode.bit: RewriteBit("*--I**0-"); break; case Opcode.call: RewriteCall(); break; case Opcode.callr: RewriteCall(); break; case Opcode.ccf: RewriteCcf(); break; case Opcode.cp: RewriteCp(); break; case Opcode.cpl: RewriteCpl("---1--1-"); break; case Opcode.daa: RewriteDaa(); break; case Opcode.dec: RewriteIncDec(m.ISub, false); break; case Opcode.decx: RewriteIncDec(m.ISub, true); break; case Opcode.di: RewriteDi(); break; case Opcode.div: RewriteDiv(); break; case Opcode.djnz: RewriteDjnz(); break; case Opcode.ei: RewriteEi(); break; case Opcode.ex: RewriteEx(); break; case Opcode.exx: RewriteExx(); break; case Opcode.halt: RewriteHalt(); break; case Opcode.inc: RewriteIncDec(m.IAdd, false); break; case Opcode.incw: RewriteIncwDecw(m.IAdd); break; case Opcode.incx: RewriteIncDec(m.IAdd, true); break; case Opcode.jp: RewriteJp(); break; case Opcode.jr: RewriteJp(); break; case Opcode.ld: RewriteLd(); break; case Opcode.ldar: RewriteLdar(); break; case Opcode.ldir: RewriteLdir("---0-00-"); break; case Opcode.ldw: RewriteLd(); break; case Opcode.mul: RewriteMul(); break; case Opcode.neg: RewriteNeg(); break; case Opcode.nop: m.Nop(); break; case Opcode.or: RewriteBinOp(m.Or, "**-00*00"); break; case Opcode.pop: RewritePop(); break; case Opcode.push: RewritePush(); break; case Opcode.rcf: RewriteRcf(); break; case Opcode.res: RewriteSetRes(false); break; case Opcode.ret: RewriteRet(); break; case Opcode.reti: RewriteReti(); break; case Opcode.rl: RewriteRotation(PseudoProcedure.RolC, true); break; case Opcode.rlc: RewriteRotation(PseudoProcedure.Rol, false); break; case Opcode.rr: RewriteRotation(PseudoProcedure.RorC, true); break; case Opcode.rrc: RewriteRotation(PseudoProcedure.Ror, false); break; case Opcode.sbc: RewriteAdcSbc(m.ISub, "**-**V1*"); break; case Opcode.scf: RewriteScf(); break; case Opcode.set: RewriteSetRes(true); break; case Opcode.tset: RewriteTset("*--I**0-"); break; case Opcode.sla: RewriteShift(m.Shl); break; case Opcode.sll: RewriteShift(m.Shl); break; case Opcode.sra: RewriteShift(m.Sar); break; case Opcode.srl: RewriteShift(m.Shr); break; case Opcode.sub: RewriteBinOp(m.ISub, "**-**V1*"); break; case Opcode.swi: RewriteSwi(); break; case Opcode.xor: RewriteBinOp(m.Xor, "**-10*00"); break; } yield return(new RtlInstructionCluster(instr.Address, instr.Length, instrs.ToArray()) { Class = rtlc, }); } }