private List <Cmd> decode_req(Req req)
{
MemAddr addr = req.addr;
List <Cmd> cmd_q = cmdqs[addr.rid, addr.bid];
int pid = req.pid;
Bank2 b = chan.ranks[addr.rid].banks[addr.bid];
List <Cmd> decode_cmd_q = new List <Cmd>(CMDQ_MAX);
if (b.curr_rowid == -1)
{
//row-closed
decode_cmd_q.Add(new Cmd(Cmd.TypeEnum.ACTIVATE, addr, pid, req, cmd_q));
}
else if (b.curr_rowid != (long)addr.rowid)
{
//row-conflict
decode_cmd_q.Add(new Cmd(Cmd.TypeEnum.PRECHARGE, addr, pid, req, cmd_q));
decode_cmd_q.Add(new Cmd(Cmd.TypeEnum.ACTIVATE, addr, pid, req, cmd_q));
}
Cmd.TypeEnum RW = (req.type == ReqType.WR ? Cmd.TypeEnum.WRITE : Cmd.TypeEnum.READ);
decode_cmd_q.Add(new Cmd(RW, addr, pid, req, cmd_q));
return(decode_cmd_q);
}
new public bool is_row_hit(Req req)
{
MemCtrl2 mctrl = get_mctrl(req);
Bank2 bank = mctrl.chan.ranks[req.addr.rid].banks[req.addr.bid];
return(bank.curr_rowid == (long)req.addr.rowid);
}
public bool is_row_hit(Req req)
{
Dbg.Assert(mctrl.cid == req.addr.cid);
Bank2 bank = mctrl.chan.ranks[req.addr.rid].banks[req.addr.bid];
return(bank.curr_rowid == (long)req.addr.rowid);
}
public MemCtrl2 get_mctrl(Bank2 bank)
{
if (!is_omniscient)
{
Dbg.Assert(mctrl.cid == bank.cid);
return(mctrl);
}
return(mctrls[bank.cid]);
}
public Req get_curr_req(Bank2 bank)
{
MemCtrl2 mc = bank.mc;
List <Req> inflight_q = mc.inflightqs[bank.rid, bank.bid];
if (inflight_q.Count == 0)
{
return(null);
}
return(inflight_q[inflight_q.Count - 1]);
}
public void tick()
{
/* blp_perproc */
Array.Clear(blp_perproc, 0, blp_perproc.Length);
foreach (Bank2 b in banks)
{
Req req = get_curr_req(b);
if (req == null)
{
continue;
}
blp_perproc[req.pid] += 1;
}
for (int pid = 0; pid < blp_perproc.Length; pid++)
{
int myblp = blp_perproc[pid];
if (myblp == 0)
{
continue;
}
Stat.procs[pid].service_blp.Collect(myblp);
}
/* wblp */
foreach (MemCtrl2 mctrl in mctrls)
{
if (!mctrl.wb_mode)
{
continue;
}
int wbmode_blp = 0;
for (uint r = 0; r < mctrl.rmax; r++)
{
for (uint b = 0; b < mctrl.bmax; b++)
{
Bank2 bank = mctrl.chan.ranks[r].banks[b];
Req req = get_curr_req(bank);
if (req == null)
{
continue;
}
wbmode_blp++;
}
}
Stat.mctrls2[mctrl.cid].wbmode_blp.Collect(wbmode_blp);
}
}
//constructor
public Rank2(MemCtrl2 mc, Channel2 chan, uint rid, uint bmax)
{
this.cid = mc.cid;
this.rid = rid;
this.mc = mc;
this.bmax = bmax;
banks = new Bank2[bmax];
for (uint i = 0; i < banks.Length; i++)
{
banks[i] = new Bank2(mc, this, i);
}
}
private void set_banks()
{
banks = new List <Bank2>();
foreach (MemCtrl2 mc in this.mctrls)
{
Channel2 chan = mc.chan;
for (uint r = 0; r < chan.rmax; r++)
{
Rank2 rank = chan.ranks[r];
for (uint b = 0; b < rank.bmax; b++)
{
Bank2 bank = rank.banks[b];
banks.Add(bank);
}
}
}
}
//constructor
public BLPTracker2(MemCtrl2[] mctrls)
{
this.mctrls = mctrls;
//banks
banks = new List <Bank2>();
foreach (MemCtrl2 mc in this.mctrls)
{
Channel2 chan = mc.chan;
for (uint r = 0; r < chan.rmax; r++)
{
Rank2 rank = chan.ranks[r];
for (uint b = 0; b < rank.bmax; b++)
{
Bank2 bank = rank.banks[b];
banks.Add(bank);
}
}
}
//blp
blp_perproc = new int[Config.N];
}
public List <Req> get_writeq(Bank2 bank)
{
MemCtrl2 mc = get_mctrl(bank);
return(mc.writeqs[bank.rid, bank.bid]);
}
public List <Req> get_readq(Bank2 bank)
{
MemCtrl2 mc = get_mctrl(bank);
return(mc.readqs[bank.rid, bank.bid]);
}
private Req __find_best_req(int r, int b)
{
//no need to search for request, already outstanding commands
if (cmdqs[r, b].Count > 0)
{
return(null);
}
/*** find best request ***/
List <Req> rq = readqs[r, b];
List <Req> wq = writeqs[r, b];
if (rq.Count == 0 && wq.Count == 0)
{
return(null);
}
Req best_req = null;
Cmd cmd = null;
//find best writeback request
if (wb_mode)
{
best_req = meta_mctrl.find_best_wb_req(wq);
if (best_req != null)
{
//check if best writeback request is schedulable
cmd = decode_req(best_req)[0];
if (!can_schedule_cmd(cmd))
{
return(null);
}
return(best_req);
}
//writeq is empty: should we let reads bypass?
if (!Config.mctrl.read_bypass)
{
return(null);
}
}
//find best read request
best_req = meta_mctrl.find_best_rd_req(rq);
/*** row-hit bypass ***/
if (Config.mctrl.row_hit_bypass)
{
Req hit_req = rh_finder.find_best_req(rq);
if (!meta_mctrl.is_row_hit(best_req) && hit_req != null)
{
Bank2 bank = chan.ranks[r].banks[b];
Dbg.Assert(bank.ts_act != -1);
long ts_pre = bank.ts_act + timing.tRAS;
long speculative_ts_pre = cycles + timing.tRTP;
if (speculative_ts_pre <= ts_pre)
{
best_req = hit_req;
}
}
}
if (best_req == null)
{
return(null);
}
//check if best request is schedulable
cmd = decode_req(best_req)[0];
if (!can_schedule_cmd(cmd))
{
return(null);
}
return(best_req);
}
