/// <summary>
/// OpCodeName = "EX",
/// Param1Type = AddressingMode.RegisterIndirect,
/// Param2Type = AddressingMode.Register16,
/// Equation = "H <-> (SP+1), L <-> (SP)",
/// Param1List = "(SP)",
/// Param2List = "HL","IX","IY"
/// UserManualPage = "125",
/// Description = "The low order byte contained in register pair HL is exchanged with the\ncontents of the memory address specified by the contents of register pair SP\n(Stack Pointer), and the high order byte of HL is exchanged with the next\nhighest memory address (SP+1).",
/// ConditionBitsAffected = "None",
/// Example = "If the HL register pair contains 7012H, the SP register pair contains 8856H,\nthe memory location 8856H contains byte 11H, and memory location\n8857H contains byte 22H, then the instruction EX (SP), HL results in the\nHL register pair containing number 2211H, memory location 8856H\ncontaining byte 12H, memory location 8857H containing byte 70H and\nStack Pointer containing 8856H."
/// MEMPTR = rp value after the operation
/// </summary>
private void Instruction_39_EX_Register16Address_Register16(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.SRL, TStates = 3
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.Z);
}
// MachineCycleType.SRH, TStates = 4
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.W);
}
// MachineCycleType.SWH, TStates = 3
if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 0)
{
InternalDataBus_SampleFrom(RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param2));
}
// MachineCycleType.SWL, TStates = 5
if (machineCycleCountAfterInstruction == 5 && halfTStateIndex == 0)
{
InternalDataBus_SampleFrom(RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param2));
}
if (machineCycleCountAfterInstruction == 5 && halfTStateIndex == 9)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.W);
InternalDataBus_SendTo(RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param2));
InternalDataBus_SampleFrom(InternalDataBusConnection.Z);
InternalDataBus_SendTo(RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param2));
}
}
/// <summary>
/// OpCodeName = "LD",
/// Param1Type = AddressingMode.Register16,
/// Param2Type = AddressingMode.Immediate16,
/// Equation = "dd <- nn",
/// Param1List = "BC","DE","HL","SP","IX","IY"
/// Param2List = "nn"
/// UserManualPage = "102",
/// Description = "The 2-byte integer nn is loaded to the dd register pair, where dd defines the\nBC, DE, HL, or SP register pairs.",
/// ConditionBitsAffected = "None",
/// Example = "At execution of LD HL, 5000H the contents of the HL register pair is 5000H."
/// </summary>
private void Instruction_64_LD_Register16_Number16(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.ODL, TStates = 3
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.SP)
{
InternalDataBus_SendTo(InternalDataBusConnection.SPl);
}
else
{
Register registerLow = RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SendTo(registerLow);
}
}
// MachineCycleType.ODH, TStates = 3
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 5)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.SP)
{
InternalDataBus_SendTo(InternalDataBusConnection.SPh);
}
else
{
Register registerHigh = RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SendTo(registerHigh);
}
}
}
/// <summary>
/// OpCodeName = "PUSH",
/// Param1Type = AddressingMode.Register16,
/// Equation = "(SP-2) <- qqL, (SP-1) <- qqH",
/// Param1List = "AF","BC","DE","HL","IX","IY"
/// UserManualPage = "116",
/// Description = "The contents of the register pair qq are pushed to the external memory\nLIFO (last-in, first-out) Stack. The Stack Pointer (SP) register pair holds the\n16-bit address of the current top of the Stack. This instruction first\ndecrements SP and loads the high order byte of register pair qq to the\nmemory address specified by the SP. The SP is decremented again and\nloads the low order byte of qq to the memory location corresponding to this\nnew address in the SP. The operand qq identifies register pair BC, DE, HL,\nor AF.",
/// ConditionBitsAffected = "None",
/// Example = "If the AF register pair contains 2233H and the Stack Pointer contains\n1007H, at instruction PUSH AF memory address 1006H contains 22H,\nmemory address 1005H contains 33H, and the Stack Pointer contains\n1005H."
/// </summary>
private void Instruction_91_PUSH_Register16(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 5
// MachineCycleType.SWH, TStates = 3
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 0)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.AF)
{
InternalDataBus_SampleFrom(Register.A);
}
else
{
Register registerHigh = RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SampleFrom(registerHigh);
}
}
// MachineCycleType.SWL, TStates = 3
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 0)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.AF)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.F);
}
else
{
Register registerLow = RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SampleFrom(registerLow);
}
}
}
/// <summary>
/// OpCodeName = "LD",
/// Param1Type = AddressingMode.Indexed,
/// Param2Type = AddressingMode.Immediate,
/// Equation = "(IX+d) <- n",
/// Param1List = "(IX+d)","(IY+d)"
/// Param2List = "n"
/// UserManualPage = "90\n91",
/// Description = "The n operand is loaded to the memory address specified by the sum of the\nIndex Register IX and the two�s complement displacement operand d.",
/// ConditionBitsAffected = "None",
/// Example = "If the Index Register IX contains the number 219AH, the instruction\nLD (IX+5H), 5AH results in byte 5AH in the memory address 219FH."
/// </summary>
private void Instruction_71_LD_IndexedAddress_Number8(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.OD, TStates = 3
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.Z);
}
// MachineCycleType.OD, TStates = 5
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.ALURightBuffer);
}
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 7)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.Z);
}
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 9)
{
InternalAddressBus_SampleFrom(RegisterUtils.GetFromAddressIndexBase((AddressIndexBase)instructionOrigin.OpCode.Param1));
InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
InternalAddressBus_SampleFromRegisterWZPlusDisplacement();
}
// MachineCycleType.MW, TStates = 3
if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 0)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.ALURightBuffer);
}
}
public FileContentResult RegisterExport(string keyword = null,
string name = null, string RAAYear = null, string country = null, string accreditedTLDs = null)
{
var query = RegisterUtils.BuildExportQuery(keyword ?? name, RAAYear, country, accreditedTLDs);
var file = this._managementRegisterService.ExportByQuery(query);
return(File(new UTF8Encoding().GetBytes(file.ToString()), "text/csv", $"Export-Registrar-{StringUtils.GetCurrentDateTimeAsString()}.csv"));
}
/// <summary>
/// OpCodeName = "LD",
/// Param1Type = AddressingMode.Register16,
/// Param2Type = AddressingMode.Extended,
/// Equation = "H <- (nn+1), L <- (nn)",
/// Param1List = "HL","BC","DE","IX","IY","SP"
/// Param2List = "(nn)"
/// UserManualPage = "105",
/// Description = "The contents of memory address (nn) are loaded to the low order portion of\nregister pair HL (register L), and the contents of the next highest memory\naddress (nn+1) are loaded to the high order portion of HL (register H). The\nfirst n operand after the Op Code is the low order byte of nn.",
/// ConditionBitsAffected = "None",
/// Example = "If address 4545H contains 37H, and address 4546H contains A1H, at\ninstruction LD HL, (4545H) the HL register pair contains A137H."
/// MEMPTR = addr +1
/// </summary>
private void Instruction_66_LD_Register16_Address(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.ODL, TStates = 3
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.Z);
}
// MachineCycleType.ODH, TStates = 3
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.W);
}
// MachineCycleType.MRL, TStates = 3
if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 0)
{
InternalAddressBus_SampleFromAndIncrement(InternalAddressBusConnection.WZ);
}
if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 5)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.SP)
{
InternalDataBus_SendTo(InternalDataBusConnection.SPl);
}
else
{
Register registerLow = RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SendTo(registerLow);
}
}
// MachineCycleType.MRH, TStates = 3
if (machineCycleCountAfterInstruction == 5 && halfTStateIndex == 0)
{
InternalAddressBus_SampleFrom(InternalAddressBusConnection.WZ);
}
if (machineCycleCountAfterInstruction == 5 && halfTStateIndex == 5)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.SP)
{
InternalDataBus_SendTo(InternalDataBusConnection.SPh);
}
else
{
Register registerHigh = RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SendTo(registerHigh);
}
}
}
/// <summary>
/// OpCodeName = "LD",
/// Param1Type = AddressingMode.Register16,
/// Param2Type = AddressingMode.Register16,
/// Equation = "SP <- HL",
/// Param1List = "SP"
/// Param2List = "HL","IX","IY"
/// UserManualPage = "113",
/// Description = "The contents of the register pair HL are loaded to the Stack Pointer (SP)",
/// ConditionBitsAffected = "None",
/// Example = "If the register pair HL contains 442EH, at instruction LD SP, HL the Stack\nPointer also contains 442EH."
/// </summary>
private void Instruction_65_LD_Register16_Register16(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 6
if (machineCycleCountAfterInstruction == 1 && halfTStateIndex == 9)
{
Register registerLow = RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param2);
InternalDataBus_SampleFrom(registerLow);
InternalDataBus_SendTo(InternalDataBusConnection.SPl);
}
if (machineCycleCountAfterInstruction == 1 && halfTStateIndex == 11)
{
Register registerHigh = RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param2);
InternalDataBus_SampleFrom(registerHigh);
InternalDataBus_SendTo(InternalDataBusConnection.SPh);
}
}
/// <summary>
/// OpCodeName = "LD",
/// Param1Type = AddressingMode.Register,
/// Param2Type = AddressingMode.Indexed,
/// Equation = "r <- (IX+d)",
/// Param1List = new string[] { "A","B","C","D","E","H","L" },
/// Param2List = new string[] { "(IX+d)","(IY+d)" },
/// UserManualPage = "84\n85",
/// Description = "The operand (IX+d), (the contents of the Index Register IX summed with\na two�s complement displacement integer d) is loaded to register r, where r identifies register A, B, C, D, E, H, or L.",
/// ConditionBitsAffected = "None",
/// Example = "If the Index Register IX contains the number 25AFH, the instruction LD B,\n(IX+19H) causes the calculation of the sum 25AFH + 19H, which points\nto memory location 25C8H. If this address contains byte 39H, the\ninstruction results in register B also containing 39H."
/// </summary>
private void Instruction_63_LD_Register_IndexedAddress(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.OD, TStates = 3
// MachineCycleType.CPU, TStates = 5
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 9)
{
InternalAddressBus_SampleFrom(RegisterUtils.GetFromAddressIndexBase((AddressIndexBase)instructionOrigin.OpCode.Param2));
InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
InternalAddressBus_SampleFromRegisterWZPlusDisplacement();
}
// MachineCycleType.MR, TStates = 3
if (machineCycleCountAfterInstruction == 4 && halfTStateIndex == 5)
{
InternalDataBus_SendTo((Register)instructionOrigin.OpCode.Param1);
}
}
/// <summary>
/// OpCodeName = "ADC",
/// Param1Type = AddressingMode.Register16,
/// Param2Type = AddressingMode.Register16,
/// Equation = "HL <- HL + ss + CY",
/// Param1List = "HL"
/// Param2List = "BC","DE","HL","SP"
/// UserManualPage = "180",
/// Description = "The contents of register pair ss (any of register pairs BC, DE, HL, or SP)\nare added with the Carry flag (C flag in the F register) to the contents of\nregister pair HL, and the result is stored in HL.",
/// ConditionBitsAffected = "S is set if result is negative, reset otherwise\nZ is set if result is zero, reset otherwise\nR is set if carry out of bit 11,. reset otherwise\nP/V is set if overflow, reset otherwise\nN is reset\nC is set if carry from bit 15, reset otherwise",
/// Example = "If the register pair BC contains 2222H, register pair HL contains 5437H,\nand the Carry Flag is set, at execution of ADC HL, BC the contents of\nHL are 765AH."
/// </summary>
private void Instruction_5_ADC_Register16_Register16(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.CPU, TStates = 4
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 1)
{
InternalAddressBus_SampleFrom(Register16.HL);
InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
}
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 7)
{
ALULeftBuffer_SampleFrom(ALULeftBufferConnection.Z);
if ((Register16)instructionOrigin.OpCode.Param2 == Register16.SP)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.SPl);
}
else
{
Register registerLow = RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param2);
InternalDataBus_SampleFrom(registerLow);
}
InternalDataBus_SendTo(InternalDataBusConnection.ALURightBuffer);
Add(true, false, true);
InternalDataBus_SendTo(Register.L);
}
// MachineCycleType.CPU, TStates = 3
if (machineCycleCountAfterInstruction == 3 && halfTStateIndex == 5)
{
ALULeftBuffer_SampleFrom(ALULeftBufferConnection.W);
Register16_Increment(InternalAddressBusConnection.WZ);
if ((Register16)instructionOrigin.OpCode.Param2 == Register16.SP)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.SPh);
}
else
{
Register registerHigh = RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param2);
InternalDataBus_SampleFrom(registerHigh);
}
InternalDataBus_SendTo(InternalDataBusConnection.ALURightBuffer);
Add(true, true, true);
InternalDataBus_SendTo(Register.H);
}
}
/// <summary>
/// OpCodeName = "BIT",
/// Param1Type = AddressingMode.Bit,
/// Param2Type = AddressingMode.Indexed,
/// Equation = "Z <- (IX+d)b",
/// Param1List = "0","1","2","3","4","5","6","7"
/// Param2List = "(IX+d)","(IY+d)"
/// UserManualPage = "228\n230",
/// Description = "This instruction tests bit b in the memory location specified by the contents\nof register pair IX combined with the two's complement displacement d\nand sets the Z flag accordingly.",
/// ConditionBitsAffected = "S is unknown\nZ is set if specified Bit is 0, reset otherwise\nH is set\nP/V is unknown\nN is reset\nC is not affected",
/// Example = "If the contents of Index Register IX are 2000H, and bit 6 in memory\nlocation 2004H contains 1, at execution of BIT 6, (IX+4H) the Z flag in\nthe F register contains 0, and bit 6 in memory location 2004H still contains\n1. Bit 0 in memory location 2004H is the least-significant bit."
/// </summary>
private void Instruction_17_BIT_Bit_IndexedAddress(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.MR, TStates = 4
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 0)
{
InternalDataBus_SampleFrom(InternalDataBusConnection.W);
InternalAddressBus_SampleFrom(RegisterUtils.GetFromAddressIndexBase((AddressIndexBase)instructionOrigin.OpCode.Param2));
InternalAddressBus_SendTo(InternalAddressBusConnection.WZ);
InternalAddressBus_SampleFromRegisterWZPlusDisplacement();
}
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 5)
{
InternalDataBus_SendTo(InternalDataBusConnection.ALURightBuffer);
}
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 7)
{
BitTest(BitUtils.ToByte((Bit)instructionOrigin.OpCode.Param1), AddressingMode.Indexed);
}
}
public ActionResult Register(int rowCount = 25, int page = 1, string keyword = null,
string name = null, string RAAYear = null, string country = null, string accreditedTLDs = null)
{
var searchResultObject = new VMSearchResultObject <Register> {
Caption = "Registrar"
};
var startIndex = (page - 1) * rowCount;
var query = RegisterUtils.BuildQuery(startIndex, rowCount, keyword ??
name, RAAYear, country, accreditedTLDs);
var registers = this._managementRegisterService.GetByQuery(query.Item1, query.Item2, out int total);
searchResultObject.ObjectResult = new VMPageResult <Register>
{
StartIndex = startIndex,
RowCount = rowCount,
Page = page,
Total = total,
Records = registers
};
if (!string.IsNullOrWhiteSpace(keyword))
{
var searchResultWrapperList = this._searchService.Search(name ?? keyword);
searchResultObject.SearchResult = new VMSearchResult
{
Table = searchResultWrapperList
};
}
ViewBag.Keyword = keyword ?? name;
ViewBag.IsAdvanceSearch = string.IsNullOrWhiteSpace(keyword);
return(View(searchResultObject));
}
/// <summary>
/// OpCodeName = "LD",
/// Param1Type = AddressingMode.RegisterIndirect,
/// Param2Type = AddressingMode.Register,
/// Equation = "(HL) <- r",
/// Param1List ="(HL)"
/// Param2List = "A","B","C","D","E","H","L"
/// Param1List = "(BC)","(DE)"
/// Param2List = "A"
/// UserManualPage = "86",
/// Description = "The contents of register r are loaded to the memory location specified by\nthe contents of the HL register pair. The symbol r identifies register A, B,\nC, D, E, H, or L.",
/// ConditionBitsAffected = "None",
/// Example = "If the contents of register pair HL specifies memory location 2146H, and\nthe B register contains byte 29H, at execution of LD (HL), B memory\naddress 2146H also contains 29H."
/// LD (BC or DE),A : MEMPTR_low = (rp + 1) & FF, MEMPTR_high = A
/// </summary>
private void Instruction_70_LD_Register16Address_Register(byte machineCycleCountAfterInstruction, byte halfTStateIndex)
{
// MachineCycleType.OCF, TStates = 4
// MachineCycleType.MW, TStates = 3
if (machineCycleCountAfterInstruction == 2 && halfTStateIndex == 0)
{
if ((Register16)instructionOrigin.OpCode.Param1 == Register16.HL)
{
InternalAddressBus_SampleFrom((Register16)instructionOrigin.OpCode.Param1);
InternalDataBus_SampleFrom((Register)instructionOrigin.OpCode.Param2);
}
else
{
InternalDataBus_SampleFrom(RegisterUtils.GetHigherPart((Register16)instructionOrigin.OpCode.Param1));
InternalDataBus_SendTo(InternalDataBusConnection.W);
InternalDataBus_SampleFrom(RegisterUtils.GetLowerPart((Register16)instructionOrigin.OpCode.Param1));
InternalDataBus_SendTo(InternalDataBusConnection.Z);
InternalAddressBus_SampleFromAndIncrement(InternalAddressBusConnection.WZ);
InternalDataBus_SampleFrom(Register.A);
InternalDataBus_SendTo(InternalDataBusConnection.W);
}
}
}
