private long ReadRegisterFixed1_31_32(NvGpuEngine2dReg Reg)
{
long Low = (uint)ReadRegister(Reg + 0);
long High = (uint)ReadRegister(Reg + 1);
return(Low | (High << 32));
}
private long ReadRegisterFixed1_31_32(NvGpuEngine2dReg reg)
{
long low = (uint)ReadRegister(reg + 0);
long high = (uint)ReadRegister(reg + 1);
return(low | (high << 32));
}
private bool TryGetCpuAddr(NvGpuEngine2dReg Reg, out long Position)
{
Position = MakeInt64From2xInt32(Reg);
Position = Gpu.GetCpuAddr(Position);
return(Position != -1);
}
private void WriteRegister(NvGpuEngine2dReg Reg, int Value)
{
Registers[(int)Reg] = Value;
}
private int ReadRegister(NvGpuEngine2dReg Reg)
{
return(Registers[(int)Reg]);
}
private long MakeInt64From2xInt32(NvGpuEngine2dReg Reg)
{
return
((long)Registers[(int)Reg + 0] << 32 |
(uint)Registers[(int)Reg + 1]);
}
