protected override byte Access(ushort addr, MemoryAccessMode mode, byte value)
{
bool isPpuAddr = addr < 0x3fff;
if (isPpuAddr)
{
if (TryAccessNameTable(addr, mode, ref value))
{
return(value);
}
return(ChrRom[m_ChrBankOffset + addr]);
}
bool isChrBankSelectAddr = addr >= 0x8000 && addr <= 0xffff;
if (mode == MemoryAccessMode.Write && isChrBankSelectAddr)
{
var bank = value % m_BankCount;
m_ChrBankOffset = bank * 0x2000;
return(0);
}
return(Mapper.Access(PrgRom, addr % m_PrgSize, mode, value));
}
protected override byte Access(ushort addr, MemoryAccessMode mode, byte value)
{
if (TryAccessNameTable(addr, mode, ref value))
{
return(value);
}
bool isChrAddr = addr <= 0x1fff;
if (isChrAddr)
{
return(Mapper.Access(ChrRom, addr, mode, value));
}
return(PrgRom[addr % m_PrgSize]);
}
protected override byte Access(ushort addr, MemoryAccessMode mode, byte value)
{
bool isCpuAddr = addr > 0x3fff;
if (isCpuAddr)
{
bool isFixedPrgAddr = addr >= 0xc000 && addr <= 0xffff;
if (mode == MemoryAccessMode.Read && isFixedPrgAddr)
{
int finalAddr = m_FinalBankOffset + addr;
return(PrgRom[finalAddr]);
}
bool isSwitchableBankAddr = addr >= 0x8000 && addr <= 0xbfff;
if (mode == MemoryAccessMode.Read && isSwitchableBankAddr)
{
return(PrgRom[m_SelectedBankOffset + addr]);
}
bool isBankSelectRegisterAddr = addr >= 0x8000 && addr <= 0xffff;
if (mode == MemoryAccessMode.Write && isBankSelectRegisterAddr)
{
m_SelectedBankOffset = (value & 0xf) % m_BankCount * 0x4000 - 0x8000;
return(0);
}
}
else
{
bool isChrRomAddr = addr <= 0x1fff;
if (isChrRomAddr)
{
return(Mapper.Access(ChrRom, addr, mode, value));
}
if (TryAccessNameTable(addr, mode, ref value))
{
return(value);
}
}
return(0);
}
