/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { if (ctx.Result is RegisterOperand) emitter.WriteByte ((byte)(0x58 + (ctx.Result as RegisterOperand).Register.RegisterCode)); else emitter.Emit (POP.Code, 0, ctx.Result, null); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { Debug.Assert(node.Result == null); OpCode opCode = ComputeOpCode(null, node.Operand1, node.Operand2); emitter.Emit(opCode, node.Operand1, node.Operand2); }
private static void MovsdRegToMemory(InstructionNode node, MachineCodeEmitter emitter) { Debug.Assert(node.Operand3.IsCPURegister); Debug.Assert(node.ResultCount == 0); Debug.Assert(!node.Operand3.IsConstant); // xmmreg1 to mem 1111 0010:0000 1111:0001 0001: mod xmmreg r/m var opcode = new OpcodeEncoder() .AppendNibble(Bits.b1111) // 4:opcode .AppendNibble(Bits.b0010) // 4:opcode .AppendNibble(Bits.b0000) // 4:opcode .AppendNibble(Bits.b1111) // 4:opcode .AppendNibble(Bits.b0001) // 4:opcode .AppendNibble(Bits.b0001) // 4:opcode // This opcode has a directionality bit, and it is set to 0 // This means we must swap around operand1 and operand3, and set offsetDestination to false .ModRegRMSIBDisplacement(false, node.Operand3, node.Operand1, node.Operand2) // Mod-Reg-RM-?SIB-?Displacement .AppendConditionalIntegerValue(node.Operand1.IsLinkerResolved, 0); // 32:memory if (node.Operand1.IsLinkerResolved) emitter.Emit(opcode, node.Operand1, (opcode.Size - 32) / 8); else emitter.Emit(opcode); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Result.IsRegister && context.Operand1.IsRegister) { emitter.EmitTwoRegisterInstructions(0x03, (byte)context.Operand1.Register.RegisterCode, (byte)context.Result.Register.RegisterCode); // cp.w Rd, Rs } else if (context.Result.IsRegister && context.Operand1.IsConstant) { int value = 0; if (IsConstantBetween(context.Operand1, -32, 31, out value)) { emitter.EmitK6immediateAndSingleRegister((sbyte)value, (byte)context.Result.Register.RegisterCode); // cp.w Rd, imm 6 bits } else if (IsConstantBetween(context.Operand1, -1048576, 1048575, out value)) { emitter.EmitRegisterOrConditionCodeAndK21((byte)0x02, (byte)context.Result.Register.RegisterCode, value); // cp.w Rd, imm 21 bits } else throw new OverflowException(); } else throw new Exception("Not supported combination of operands"); }
private static void MovImmediateToFixedMemory(InstructionNode node, MachineCodeEmitter emitter) { Debug.Assert(node.Operand1.IsConstant); Debug.Assert(node.Operand2.IsConstantZero); Debug.Assert(node.Operand3.IsConstant); Debug.Assert(node.ResultCount == 0); var linkreference = node.Operand3.IsLabel || node.Operand3.IsField || node.Operand3.IsSymbol; // immediate to memory 1100 011w: mod 000 r/m : immediate data var opcode = new OpcodeEncoder() .AppendConditionalPrefix(0x66, node.Size == InstructionSize.Size16) // 8:prefix: 16bit .AppendNibble(Bits.b1100) // 4:opcode .Append3Bits(Bits.b011) // 3:opcode .AppendWidthBit(node.Size != InstructionSize.Size8) // 1:width .AppendMod(Bits.b00) // 2:mod (000) .Append3Bits(Bits.b000) // 3:source (000) .AppendRM(node.Operand1) // 3:r/m (destination) .AppendConditionalDisplacement(node.Operand1, !linkreference) // 32:displacement value .AppendConditionalIntegerValue(0, linkreference) // 32:memory .AppendInteger(node.Operand3, node.Size); // 8/16/32:immediate if (linkreference) emitter.Emit(opcode, node.Operand1, (opcode.Size - (int)node.Size) / 8); else emitter.Emit(opcode); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> /// <exception cref="System.NotSupportedException"></exception> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { OpCode opcode = null; switch (node.ConditionCode) { case ConditionCode.Equal: opcode = CMOVO; break; case ConditionCode.NotEqual: opcode = CMOVNE; break; case ConditionCode.Zero: opcode = CMOVZ; break; case ConditionCode.NotZero: opcode = CMOVNZ; break; case ConditionCode.GreaterOrEqual: opcode = CMOVGE; break; case ConditionCode.GreaterThan: opcode = CMOVG; break; case ConditionCode.LessOrEqual: opcode = CMOVLE; break; case ConditionCode.LessThan: opcode = CMOVL; break; case ConditionCode.UnsignedGreaterOrEqual: opcode = CMOVNB; break; case ConditionCode.UnsignedGreaterThan: opcode = CMOVA; break; case ConditionCode.UnsignedLessOrEqual: opcode = CMOVBE; break; case ConditionCode.UnsignedLessThan: opcode = CMOVB; break; case ConditionCode.Signed: opcode = CMOVS; break; case ConditionCode.NotSigned: opcode = CMOVNS; break; case ConditionCode.Carry: opcode = CMOVC; break; case ConditionCode.NoCarry: opcode = CMOVNC; break; case ConditionCode.Overflow: opcode = CMOVO; break; case ConditionCode.NoOverflow: opcode = CMOVNO; break; case ConditionCode.Parity: opcode = CMOVP; break; case ConditionCode.NoParity: opcode = CMOVNP; break; default: throw new NotSupportedException(); } emitter.Emit(opcode, node.Result, node.Operand1); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> /// <exception cref="System.NotSupportedException"></exception> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { OpCode opcode; switch (node.ConditionCode) { case ConditionCode.Equal: opcode = E; break; case ConditionCode.LessThan: opcode = LT; break; case ConditionCode.LessOrEqual: opcode = LE; break; case ConditionCode.GreaterOrEqual: opcode = GE; break; case ConditionCode.GreaterThan: opcode = GT; break; case ConditionCode.NotEqual: opcode = NE; break; case ConditionCode.UnsignedGreaterOrEqual: opcode = UGE; break; case ConditionCode.UnsignedGreaterThan: opcode = UGT; break; case ConditionCode.UnsignedLessOrEqual: opcode = ULE; break; case ConditionCode.UnsignedLessThan: opcode = ULT; break; case ConditionCode.Parity: opcode = P; break; case ConditionCode.NoParity: opcode = NP; break; case ConditionCode.NoCarry: opcode = NC; break; case ConditionCode.Carry: opcode = C; break; case ConditionCode.Zero: opcode = Z; break; case ConditionCode.NotZero: opcode = NZ; break; default: throw new NotSupportedException(); } emitter.Emit(opcode, node.Result, null); }
/// <summary> /// /// </summary> /// <param name="ctx"></param> /// <param name="emitter"></param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { RegisterOperand rop = (RegisterOperand)ctx.Result; MemoryOperand mop = (MemoryOperand)ctx.Operand1; byte[] code; if (null != mop.Base) { code = new byte[] { 0x8d, 0x84, (4 << 3) }; code[1] |= (byte)((rop.Register.RegisterCode & 0x7)); code[2] |= (byte)((mop.Base.RegisterCode & 0x7)); } else { code = new byte[] { 0xb8 }; } emitter.Write (code, 0, code.Length); emitter.EmitImmediate (mop); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> /// <exception cref="System.NotSupportedException"></exception> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { byte[] opcode = null; switch (node.ConditionCode) { case ConditionCode.Equal: opcode = JE; break; case ConditionCode.NotEqual: opcode = JNE; break; case ConditionCode.Zero: opcode = JZ; break; case ConditionCode.NotZero: opcode = JNZ; break; case ConditionCode.GreaterOrEqual: opcode = JGE; break; case ConditionCode.GreaterThan: opcode = JG; break; case ConditionCode.LessOrEqual: opcode = JLE; break; case ConditionCode.LessThan: opcode = JL; break; case ConditionCode.UnsignedGreaterOrEqual: opcode = JAE; break; case ConditionCode.UnsignedGreaterThan: opcode = JA; break; case ConditionCode.UnsignedLessOrEqual: opcode = JBE; break; case ConditionCode.UnsignedLessThan: opcode = JB; break; case ConditionCode.Signed: opcode = JS; break; case ConditionCode.NotSigned: opcode = JNS; break; case ConditionCode.Carry: opcode = JC; break; case ConditionCode.NoCarry: opcode = JNC; break; case ConditionCode.Overflow: opcode = JO; break; case ConditionCode.NoOverflow: opcode = JNO; break; case ConditionCode.Parity: opcode = JP; break; case ConditionCode.NoParity: opcode = JNP; break; default: throw new NotSupportedException(); } emitter.EmitRelativeBranch(opcode, node.BranchTargets[0].Label); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Result is RegisterOperand && context.Operand1 is ConstantOperand) { RegisterOperand reg = context.Result as RegisterOperand; ConstantOperand op = context.Operand1 as ConstantOperand; int value = 0; if (IsConstantBetween(op, -128, 127, out value)) { emitter.EmitK8immediateAndSingleRegister(0x01, (sbyte)value, (byte)reg.Register.RegisterCode); // mov Rd, Imm (k8) } else if (IsConstantBetween(op, -1048576, 1048575, out value)) { emitter.EmitRegisterOrConditionCodeAndK21(0x03, (byte)reg.Register.RegisterCode, value); // mov Rd, Imm (k21) } else throw new OverflowException(); } else if ((context.Result is RegisterOperand) && (context.Operand1 is RegisterOperand)) { RegisterOperand destination = context.Result as RegisterOperand; RegisterOperand source = context.Operand1 as RegisterOperand; emitter.EmitTwoRegisterInstructions(0x09, (byte)source.Register.RegisterCode, (byte)destination.Register.RegisterCode); // mov Rd, Rs } //else //throw new Exception("Not supported combination of operands"); }
/// <summary> /// /// </summary> /// <param name="ctx"></param> /// <param name="emitter"></param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { emitter.Emit (new OpCode (new byte[] { 0xf, 0xa2 }), null, null); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Result is RegisterOperand && context.Operand1 is RegisterOperand && context.Operand2 is RegisterOperand) { RegisterOperand destination = context.Result as RegisterOperand; RegisterOperand firstSource = context.Operand1 as RegisterOperand; RegisterOperand secondSource = context.Operand2 as RegisterOperand; emitter.EmitThreeRegistersUnshifted(0x24, (byte)firstSource.Register.RegisterCode, (byte)secondSource.Register.RegisterCode, (byte)destination.Register.RegisterCode); } else if (context.Result is RegisterOperand && context.Operand1 is RegisterOperand && context.Operand2 is ConstantOperand) { RegisterOperand destination = context.Result as RegisterOperand; RegisterOperand source = context.Operand1 as RegisterOperand; ConstantOperand immediate = context.Operand2 as ConstantOperand; int value = 0; if (IsConstantBetween(immediate, -128, 127, out value)) { emitter.EmitTwoRegisterOperandsWithK8Immediate(0x00, (byte)source.Register.RegisterCode, (byte)destination.Register.RegisterCode, (sbyte)value); } else throw new OverflowException(); } else if (context.Result is RegisterOperand && context.Operand1 is RegisterOperand) { RegisterOperand destination = context.Result as RegisterOperand; RegisterOperand source = context.Operand1 as RegisterOperand; emitter.EmitTwoRegisterInstructions(0x13, (byte)source.Register.RegisterCode, (byte)destination.Register.RegisterCode); } else { throw new Exception("Not supported combination of operands"); } }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> /// <exception cref="System.InvalidOperationException">@unable to emit opcode for segment register</exception> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { if (node.Operand1.IsConstant) { if (node.Operand1.IsByte) emitter.Emit(CONST8, node.Operand1); else if (node.Operand1.IsShort || node.Operand1.IsChar) emitter.Emit(CONST16, node.Operand1); else if (node.Operand1.IsInt) emitter.Emit(CONST32, node.Operand1); return; } if (node.Operand1.IsCPURegister) { if (node.Operand1.Register is SegmentRegister) switch ((node.Operand1.Register as SegmentRegister).Segment) { case SegmentRegister.SegmentType.CS: emitter.Emit(PUSH_CS); return; case SegmentRegister.SegmentType.SS: emitter.Emit(PUSH_SS); return; case SegmentRegister.SegmentType.DS: emitter.Emit(PUSH_DS); return; case SegmentRegister.SegmentType.ES: emitter.Emit(PUSH_ES); return; case SegmentRegister.SegmentType.FS: emitter.Emit(PUSH_FS); return; case SegmentRegister.SegmentType.GS: emitter.Emit(PUSH_GS); return; default: throw new InvalidOperationException(@"unable to emit opcode for segment register"); } } emitter.Emit(PUSH, node.Operand1); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { Debug.Assert(context.Result == null); OpCode opCode = ComputeOpCode(null, context.Operand1, context.Operand2); emitter.Emit(opCode, context.Operand1, context.Operand2); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { if (ctx.Operand1 is RegisterOperand) emitter.Emit(JmpReg, ctx.Operand1); else emitter.EmitBranch(JMP, ctx.Branch.Targets[0]); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { // TODO: Remove if (context.Operand1 is MemberOperand) return; if (context.Result is RegisterOperand && context.Operand1 is MemoryOperand) { RegisterOperand result = context.Result as RegisterOperand; MemoryOperand operand = context.Operand1 as MemoryOperand; int displacement = operand.Offset.ToInt32(); if (IsBetween(displacement, 0, 7)) { emitter.EmitTwoRegisterInstructions((byte)(0x0C & displacement), (byte)operand.Base.RegisterCode, (byte)result.Register.RegisterCode); } else if (IsBetween(displacement, -32768, 32767)) { emitter.EmitTwoRegistersAndK16(0x13, (byte)operand.Base.RegisterCode, (byte)result.Register.RegisterCode, (short)displacement); } else throw new OverflowException(); } else throw new Exception("Not supported combination of operands"); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { if (ctx.Operand1 is ConstantOperand) { if (IsByte(ctx.Operand1)) emitter.Emit(CONST8, ctx.Operand1, null); else if (IsShort(ctx.Operand1) || IsChar(ctx.Operand1)) emitter.Emit(CONST16, ctx.Operand1, null); else if (IsInt(ctx.Operand1)) emitter.Emit(CONST32, ctx.Operand1, null); return; } if (ctx.Operand1 is RegisterOperand) { if ((ctx.Operand1 as RegisterOperand).Register is SegmentRegister) switch (((ctx.Operand1 as RegisterOperand).Register as SegmentRegister).Segment) { case SegmentRegister.SegmentType.CS: emitter.Emit(PUSH_CS, null, null); return; case SegmentRegister.SegmentType.SS: emitter.Emit(PUSH_SS, null, null); return; case SegmentRegister.SegmentType.DS: emitter.Emit(PUSH_DS, null, null); return; case SegmentRegister.SegmentType.ES: emitter.Emit(PUSH_ES, null, null); return; case SegmentRegister.SegmentType.FS: emitter.Emit(PUSH_FS, null, null); return; case SegmentRegister.SegmentType.GS: emitter.Emit(PUSH_GS, null, null); return; default: throw new InvalidOperationException(@"unable to emit opcode for segment register"); } } emitter.Emit(PUSH, ctx.Operand1, null, null); }
private static void CmpXchg(InstructionNode node, MachineCodeEmitter emitter) { Debug.Assert(node.Result.IsRegister); Debug.Assert(node.Operand1.IsRegister); Debug.Assert(node.Operand2.IsRegister); Debug.Assert(node.GetOperand(3).IsRegister); Debug.Assert(node.Result.Register == GeneralPurposeRegister.EAX); Debug.Assert(node.Operand1.Register == GeneralPurposeRegister.EAX); Debug.Assert(node.ResultCount == 1); var linkreference = node.Operand2.IsLabel || node.Operand2.IsField || node.Operand2.IsSymbol; // Compare EAX with r/m32. If equal, ZF is set and r32 is loaded into r/m32. // Else, clear ZF and load r/m32 into EAX. // memory, register 0000 1111 : 1011 000w : mod reg r/m var opcode = new OpcodeEncoder() .AppendConditionalPrefix(0x66, node.Size == InstructionSize.Size16) // 8:prefix: 16bit .AppendNibble(Bits.b0000) // 4:opcode .AppendNibble(Bits.b1111) // 4:opcode .AppendNibble(Bits.b1011) // 4:opcode .Append3Bits(Bits.b000) // 3:opcode .AppendWidthBit(node.Size != InstructionSize.Size8) // 1:width .ModRegRMSIBDisplacement(node.GetOperand(3), node.Operand2, node.Operand3) // Mod-Reg-RM-?SIB-?Displacement .AppendConditionalIntegerValue(0, linkreference); // 32:memory if (linkreference) emitter.Emit(opcode, node.Operand1, (opcode.Size - 32) / 8); else emitter.Emit(opcode); }
protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { Debug.Assert(node.Result.IsRegister); Debug.Assert(node.Operand1.IsRegister); Debug.Assert(node.Operand2.IsConstant); // reg from xmmreg, imm8 // 0110 0110:0000 1111:0011 1010: 0001 0110:11 xmmreg reg: imm8 var opcode = new OpcodeEncoder() .AppendNibble(Bits.b0110) // 4:opcode .AppendNibble(Bits.b0110) // 4:opcode .AppendNibble(Bits.b0000) // 4:opcode .AppendNibble(Bits.b1111) // 4:opcode .AppendNibble(Bits.b0011) // 4:opcode .AppendNibble(Bits.b1010) // 4:opcode .AppendNibble(Bits.b0001) // 4:opcode .AppendNibble(Bits.b0110) // 4:opcode .Append2Bits(Bits.b11) // 2:opcode .AppendRM(node.Operand1) // 3:r/m (source) .AppendRegister(node.Result.Register) // 3:register (destination) .AppendByteValue((byte)node.Operand2.ConstantUnsignedInteger); // 8:memory emitter.Emit(opcode); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.OperandCount == 0) { // TODO: //emitter.EmitBranch(LabelCall, context.BranchTargets[0]); return; } Operand destinationOperand = context.Operand1; SymbolOperand destinationSymbol = destinationOperand as SymbolOperand; if (destinationSymbol != null) { emitter.Call(destinationSymbol); } else { if (destinationOperand is MemoryOperand) { //RegisterOperand register = destinationOperand as RegisterOperand; //emitter.EmitSingleRegisterInstructions(0x11, (byte)register.Register.RegisterCode); MemoryOperand memory = destinationOperand as MemoryOperand; emitter.EmitRegisterOperandWithK16(0x101, (byte)memory.Base.RegisterCode, (ushort)memory.Offset); } } }
private static void MovImmediateToFixedMemory(InstructionNode node, MachineCodeEmitter emitter) { Debug.Assert(node.Operand1.IsConstant); Debug.Assert(node.Operand2.IsResolvedConstant); Debug.Assert(node.Operand3.IsConstant); // immediate to memory 1100 011w: mod 000 r/m : immediate data var opcode = new OpcodeEncoder() .AppendConditionalPrefix(node.Size == InstructionSize.Size16, 0x66) // 8:prefix: 16bit .AppendNibble(Bits.b1100) // 4:opcode .Append3Bits(Bits.b011) // 3:opcode .AppendWidthBit(node.Size != InstructionSize.Size8) // 1:width .AppendMod(Bits.b00) // 2:mod (00) .Append3Bits(Bits.b000) // 3:source (000) .AppendRM(node.Operand1) // 3:r/m (destination) .AppendConditionalDisplacement(!node.Operand1.IsLinkerResolved, node.Operand1) // 32:displacement value .AppendConditionalIntegerValue(node.Operand1.IsLinkerResolved, 0) // 32:memory .AppendInteger(node.Operand3, node.Size); // 8/16/32:immediate if (node.Operand1.IsLinkerResolved && !node.Operand3.IsLinkerResolved) emitter.Emit(opcode, node.Operand1, 2, node.Operand2.ConstantSignedInteger); else if (node.Operand1.IsLinkerResolved && node.Operand3.IsLinkerResolved) { // fixme: trouble! throw new NotImplementCompilerException("not here"); } else emitter.Emit(opcode); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Result.IsRegister && context.Operand1.IsRegister && context.Operand2.IsRegister) { emitter.EmitThreeRegistersUnshifted(0x24, (byte)context.Operand1.Register.RegisterCode, (byte)context.Operand2.Register.RegisterCode, (byte)context.Result.Register.RegisterCode); } else if (context.Result.IsRegister && context.Operand1.IsRegister && context.Operand2.IsConstant) { int value = 0; if (IsConstantBetween(context.Operand2, -128, 127, out value)) { emitter.EmitTwoRegisterOperandsWithK8Immediate(0x00, (byte)context.Operand1.Register.RegisterCode, (byte)context.Result.Register.RegisterCode, (sbyte)value); } else throw new OverflowException(); } else if (context.Result.IsRegister && context.Operand1.IsRegister) { emitter.EmitTwoRegisterInstructions(0x13, (byte)context.Operand1.Register.RegisterCode, (byte)context.Result.Register.RegisterCode); } else { throw new Exception("Not supported combination of operands"); } }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { emitter.WriteByte(0xE8); emitter.WriteByte(0x00); emitter.WriteByte(0x00); emitter.WriteByte(0x00); emitter.WriteByte(0x00); emitter.Call(ctx.InvokeTarget); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.OperandCount == 0) { emitter.EmitRelativeJumpAndCall(0x00, context.BranchTargets[0]); } else throw new Exception("Not supported combination of operands"); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Operand1.IsRegister) { emitter.EmitSingleRegisterInstructions(0x11, (byte)context.Operand1.Register.RegisterCode); } else throw new Exception("Not supported combination of operands"); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { switch (context.ConditionCode) { case IR.ConditionCode.Equal: emitter.EmitBranch(JE, context.BranchTargets[0]); break; case IR.ConditionCode.GreaterOrEqual: emitter.EmitBranch(JGE, context.BranchTargets[0]); break; case IR.ConditionCode.GreaterThan: emitter.EmitBranch(JG, context.BranchTargets[0]); break; case IR.ConditionCode.LessOrEqual: emitter.EmitBranch(JLE, context.BranchTargets[0]); break; case IR.ConditionCode.LessThan: emitter.EmitBranch(JL, context.BranchTargets[0]); break; case IR.ConditionCode.NotEqual: emitter.EmitBranch(JNE, context.BranchTargets[0]); break; case IR.ConditionCode.UnsignedGreaterOrEqual: emitter.EmitBranch(JAE, context.BranchTargets[0]); break; case IR.ConditionCode.UnsignedGreaterThan: emitter.EmitBranch(JA, context.BranchTargets[0]); break; case IR.ConditionCode.UnsignedLessOrEqual: emitter.EmitBranch(JBE, context.BranchTargets[0]); break; case IR.ConditionCode.UnsignedLessThan: emitter.EmitBranch(JB, context.BranchTargets[0]); break; case IR.ConditionCode.NotSigned: emitter.EmitBranch(JNS, context.BranchTargets[0]); break; case IR.ConditionCode.Signed: emitter.EmitBranch(JS, context.BranchTargets[0]); break; default: throw new NotSupportedException(); } }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Result is RegisterOperand && context.Operand1 is RegisterOperand) { RegisterOperand destination = context.Result as RegisterOperand; RegisterOperand source = context.Operand1 as RegisterOperand; emitter.EmitTwoRegisterInstructions(0x06, (byte)destination.Register.RegisterCode, (byte)source.Register.RegisterCode); } else throw new Exception("Not supported combination of operands"); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { if (node.Operand3.IsConstant) { emitter.Emit(C, node.Operand2, node.Result, node.Operand3); } else { emitter.Emit(RM, node.Operand2, node.Result); } }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { if (node.Operand1.IsConstant && node.Result.IsCPURegister) { MovFixedMemoryToReg(node, emitter); } else { MovMemoryToReg(node, emitter); } }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { if (context.Result.IsRegister && context.Operand1.IsRegister) { emitter.EmitTwoRegisterInstructions((byte)0x00, (byte)context.Operand1.Register.RegisterCode, (byte)context.Result.Register.RegisterCode); } else { throw new Exception("Not supported combination of operands"); } }
private static readonly OpCode opcode = new OpCode(new byte[] { 0x0F, 0xA2 }); // Move imm32 to r/m32 #endregion // Data Members #region Methods /// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { emitter.Emit(opcode, null, null); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { EmitMultiplyInstruction(node, emitter); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { emitter.Emit(opcode, node.Operand2, null); }
/// <summary> /// Emits the specified CTX. /// </summary> /// <param name="context">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context context, MachineCodeEmitter emitter) { emitter.WriteByte(0xF3); emitter.WriteByte(0x90); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { emitter.WriteByte(0xCF); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { MovssRegToMemory(node, emitter); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { emitter.Emit(new OpCode(new byte[] { 0x90 }), null, null); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { emitter.WriteByte(0xAB); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { // TODO }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { EmitDataProcessingInstruction(node, emitter, Bits.b1011); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { LidtMemoryConstant(node, emitter); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { OpCode opCode = ComputeOpCode(node.Result, node.Operand1, null); emitter.Emit(opCode, node.Result, node.Operand1); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { CmpXchg(node, emitter); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="ctx">The context.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(Context ctx, MachineCodeEmitter emitter) { OpCode opCode = ComputeOpCode(ctx.Result, ctx.Operand1, ctx.Operand2); emitter.Emit(opCode, ctx.Operand1, null); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { emitter.WriteByte(0xCD); emitter.WriteByte((byte)node.Operand1.ConstantUnsignedInteger); }
/// <summary> /// Emits the specified platform instruction. /// </summary> /// <param name="node">The node.</param> /// <param name="emitter">The emitter.</param> protected override void Emit(InstructionNode node, MachineCodeEmitter emitter) { EmitMemoryLoadStore(node, emitter, TransferType.Load); }