public override bool InitTargert()
{
bool status = false;
UInt32 data = 0;
FlashID = 0x0;
cb_log?.Invoke("Init SoC ...");
//JLinkARM.JLINKARM_Reset();
JLinkARM.JLINKARM_Halt();
ReadFlashID();
// RAM test
/*
* UInt32[] test = new UInt32[200];
* for (UInt16 i = 0; i < test.Length; i++)
* test[i] = i;
* WriteU32((UInt32)AmebaZ_Addresses.RAMAddr, (UInt32)test.Length, test);
* WriteU32((UInt32)AmebaZ_Addresses.RAMAddr, 0x11002200);
*
* UInt32[] test_r = new UInt32[200];
* ReadU32((UInt32)AmebaZ_Addresses.RAMAddr, 200, ref test_r);
*/
if (IsConnected)
{
// System Init
ReadU32(0x40000210, ref data);
data &= 0xe7ff_ffff; // 27, 28
data |= 0x0400_0000; // 26
WriteU32(0x40000210, data);
// Load Flasher
WriteU32(AmebaZ_Addresses.RAMImage1Addr, (UInt32)AmebaZ_Code.Flasher.Length, AmebaZ_Code.Flasher);
JLinkARM.JLINKARM_WriteReg((UInt32)JLink_ARM_CM4_Register.FAULTMASK, 0x00);
JLinkARM.JLINKARM_WriteReg((UInt32)JLink_ARM_CM4_Register.R13, (UInt32)AmebaZ_Addresses.Stack); // Stack pointer
JLinkARM.JLINKARM_WriteReg((UInt32)JLink_ARM_CM4_Register.R15, (UInt32)AmebaZ_Addresses.FirmwareAddr); // Program counter
JLinkARM.JLINKARM_Go();
status = true;
}
IsInited = status;
return(status);
}
public override bool InitTargert()
{
bool status = false;
UInt32 data = 0;
FlashID = 0x0;
//JedecID = 0x0;
cb_log?.Invoke("Init SoC ...");
JLinkARM.JLINKARM_Reset();
//JLinkARM.JLINKARM_ResetNoHalt();
// TEST
//UInt32[] test = new UInt32[200];
//WriteU32((UInt32)AmebaA_Flasher.RAMAddr, 4, new UInt32[] { 0x11aa22bb , 0x33cc44dd , 0x66778899, 0x11223344 });
//WriteU32((UInt32)AmebaA_Flasher.RAMAddr, 0x11002200);
//ReadU32((UInt32)AmebaA_Flasher.RAMAddr, ref data);
//ReadU32((UInt32)AmebaA_Flasher.RAMAddr, 200, ref test);
if (IsConnected)
{
// System Init
WriteU32(0x40000304, 0x1FC00002);
WriteU32(0x40000250, 0x400);
WriteU32(0x40000340, 0x0);
WriteU32(0x40000230, 0xdcc4);
WriteU32(0x40000210, 0x11113);
WriteU32(0x400002c0, 0x110011);
WriteU32(0x40000320, 0xffffffff);
WriteU32(0x40000014, 0x011); // Set CLK 166.66 MHz
status = ReadU32(0x40000230, ref data);
if (status)
{
// enable spi flash peripheral clock
data |= 0x300;
WriteU32(0x40000230, data);
// enable spi flash peripheral
ReadU32(0x40000210, ref data);
data &= 0x0FFFFFF;
data |= 0x10;
WriteU32(0x40000210, data);
// select spi flash pinout (0 - internal), enable spi flash pins
ReadU32(0x400002C0, ref data);
data &= 0xFFFFFFF8; // 0xFFFFFFF9
data |= 0x1;
WriteU32(0x400002C0, data);
WriteU32(0x40006008, 0x0); // disable SPI FLASH operation
WriteU32(0x4000602C, 0x0); // disable all interrupts
WriteU32(0x40006010, 0x1); // use first "slave select" pin
WriteU32(0x40006014, 0x2); // baud rate, default value
WriteU32(0x40006018, 0x0); // tx fifo threshold
WriteU32(0x4000601C, 0x0); // rx fifo threshold
WriteU32(0x4000604C, 0x0); // disable DMA
WriteU32(AmebaA_Addresses.Addr + 0x08, 0);
WriteU32(AmebaA_Addresses.Addr + 0x00, 1);
WriteU32(AmebaA_Addresses.FirmwareAddr, (UInt32)AmebaA_Code.Flasher.Length, AmebaA_Code.Flasher);
// Если нажали сброс в пустую RAM, то запустит RTLConcoleRAM
WriteU32(AmebaA_Addresses.RAMBootAddr, (UInt32)AmebaA_Code.Console.Length, AmebaA_Code.Console);
JLinkARM.JLINKARM_WriteReg((UInt32)JLink_ARM_CM3_Register.FAULTMASK, 0x00); //0x01
JLinkARM.JLINKARM_WriteReg((UInt32)JLink_ARM_CM3_Register.R13, (UInt32)AmebaA_Addresses.Stack); // $sp
JLinkARM.JLINKARM_WriteReg((UInt32)JLink_ARM_CM3_Register.R15, (UInt32)AmebaA_Addresses.FirmwareAddr); // $pc
JLinkARM.JLINKARM_Go();
//cb_log?.Invoke(String.Format("Is halted ? {0}", JLinkARM.JLINKARM_IsHalted()));
status = false;
if (WaitTarget())
{
ReadFlashID();
//ReadU32(AmebaA_Flasher.Addr + 0x0C, ref data);
//FlashID = (UInt32)((data & 0xFFFFFF) | (FlashWriteReadCMD(0xAB, 3, 1) << 24));
CheckFlashID();
status = true;
}
}
}
IsInited = status;
return(status);
}