public void XRLC_B_WorksWithNegativeOffset() { // --- Arrange const byte OFFS = 0xFE; var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xDD, 0xCB, OFFS, 0x00 // RLC (IX+32H),B }); var regs = m.Cpu.Registers; regs.IX = 0x1000; m.Memory[regs.IX - 256 + OFFS] = 0x08; // --- Act m.Run(); // --- Assert regs.B.ShouldBe(m.Memory[regs.IX - 256 + OFFS]); regs.B.ShouldBe((byte)0x10); regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); regs.PFlag.ShouldBeFalse(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F, B"); m.ShouldKeepMemory(except: "0FFE"); regs.PC.ShouldBe((ushort)0x0004); m.Cpu.Tacts.ShouldBe(23L); }
public void CALL_PE_DoesNotCallWhenPO() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x2A, // LD A,2AH 0x87, // ADD A 0xEC, 0x07, 0x00, // CALL PE,0007H 0x76, // HALT 0x3E, 0x24, // LD A,24H 0xC9 // RET }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x54); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0006); m.Cpu.Tacts.ShouldBe(25); }
public void RST_28_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0x3E, 0x12, // LD A,12H 0xEF // RST 28H }); // --- Act m.Run(); m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x12); regs.SP.ShouldBe((ushort)0xFFFE); regs.PC.ShouldBe((ushort)0x28); m.Memory[0xFFFE].ShouldBe((byte)0x03); m.Memory[0xFFFf].ShouldBe((byte)0x00); m.ShouldKeepRegisters(except: "SP"); m.ShouldKeepMemory(except: "FFFE-FFFF"); m.Cpu.Tacts.ShouldBe(18L); }
public void JP_PE_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x88, // LD A,88H 0x87, // ADD A 0xEA, 0x07, 0x00, // JP PE,0007H 0x76, // HALT 0x3E, 0xAA, // LD A,AAH 0x76 // HALT }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0xAA); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0009); m.Cpu.Tacts.ShouldBe(32L); }
public void JP_PE_DoesNotJumpWhenPO() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x2A, // LD A,2AH 0x87, // ADD A 0xEA, 0x07, 0x00, // JP PE,0007H 0x76, // HALT 0x3E, 0xAA, // LD A,AAH 0x76 // HALT }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x54); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0006); m.Cpu.Tacts.ShouldBe(25); }
public void ADD_HL_SP_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x21, 0x34, 0x12, // LD HL,1234H 0x31, 0x45, 0x23, // LD SP,2345H 0x39 // ADD HL,SP }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; m.ShouldKeepRegisters(except: "F, HL, SP"); m.ShouldKeepMemory(); regs.HL.ShouldBe((ushort)0x3579); regs.PC.ShouldBe((ushort)0x0007); m.Cpu.Tacts.ShouldBe(31L); }
public void IND_WorksWithZeroedCounter() { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xED, 0xAA // IND }); var regs = m.Cpu.Registers; regs.BC = 0x01CC; regs.HL = 0x1000; m.IoInputSequence.Add(0x69); // --- Act m.Run(); // --- Assert m.Memory[0x1000].ShouldBe((byte)0x69); regs.B.ShouldBe((byte)0x00); regs.C.ShouldBe((byte)0xCC); regs.HL.ShouldBe((ushort)0x0FFF); regs.ZFlag.ShouldBeTrue(); regs.NFlag.ShouldBeTrue(); regs.CFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F, BC, HL"); m.ShouldKeepMemory(except: "1000"); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(16L); }
public void CP_N_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0xFE, 0x24 // CP 24H }); m.Cpu.Registers.A = 0x36; // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.HFlag.ShouldBeFalse(); regs.PFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); regs.NFlag.ShouldBeTrue(); m.ShouldKeepRegisters(except: "F"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(7L); }
public void SRA_HLi_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xCB, 0x2E // SRA (HL) }); var regs = m.Cpu.Registers; regs.HL = 0x1000; m.Memory[regs.HL] = 0x10; // --- Act m.Run(); // --- Assert m.Memory[regs.HL].ShouldBe((byte)0x08); regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); regs.PFlag.ShouldBeFalse(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F"); m.ShouldKeepMemory(except: "1000"); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(15L); }
public void RET_M_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0xC0, // LD A,C0H 0xCD, 0x06, 0x00, // CALL 0006H 0x76, // HALT 0x87, // ADD A 0xF8, // RET M 0x3E, 0x24, // LD A,24H 0xC9 // RET }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x80); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0005); m.Cpu.Tacts.ShouldBe(43L); }
public void EI_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xFB // EI }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; m.Cpu.IFF1.ShouldBeTrue(); m.Cpu.IFF2.ShouldBeTrue(); m.ShouldKeepRegisters(); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0001); m.Cpu.Tacts.ShouldBe(4L); }
public void PUSH_AF_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0xF5, // PUSH AF 0xC1 // POP BC }); m.Cpu.Registers.AF = 0x3456; // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.BC.ShouldBe((ushort)0x3456); m.ShouldKeepRegisters(except: "BC"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(21L); }
public void XRLC_B_SetsCarry() { // --- Arrange const byte OFFS = 0x32; var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xDD, 0xCB, OFFS, 0x00 // RLC (IX+32H),B }); var regs = m.Cpu.Registers; regs.IX = 0x1000; m.Memory[regs.IX + OFFS] = 0x84; // --- Act m.Run(); // --- Assert regs.B.ShouldBe(m.Memory[regs.IX + OFFS]); regs.B.ShouldBe((byte)0x09); regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.CFlag.ShouldBeTrue(); regs.PFlag.ShouldBeTrue(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F, B"); m.ShouldKeepMemory(except: "1032"); regs.PC.ShouldBe((ushort)0x0004); m.Cpu.Tacts.ShouldBe(23L); }
public void XRRC_A_WorksAsExpected() { // --- Arrange const byte OFFS = 0x32; var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xDD, 0xCB, OFFS, 0x0F // RRC (IX+32H),A }); var regs = m.Cpu.Registers; regs.IX = 0x1000; m.Memory[regs.IX + OFFS] = 0x08; // --- Act m.Run(); // --- Assert regs.A.ShouldBe(m.Memory[regs.IX + OFFS]); regs.A.ShouldBe((byte)0x04); regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); regs.PFlag.ShouldBeFalse(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F, A"); m.ShouldKeepMemory(except: "1032"); regs.PC.ShouldBe((ushort)0x0004); m.Cpu.Tacts.ShouldBe(23L); }
public void LD_NNi_A_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x3E, 0xA9, // LD A,A9H 0x32, 0x00, 0x10 // LD (1000H),A }); // --- Act var before = m.Memory[0x1000]; m.Run(); var after = m.Memory[0x1000]; // --- Assert var regs = m.Cpu.Registers; m.ShouldKeepRegisters(except: "A"); m.ShouldKeepMemory(except: "1000"); before.ShouldBe((byte)0x00); after.ShouldBe((byte)0xA9); regs.PC.ShouldBe((ushort)0x0005); m.Cpu.Tacts.ShouldBe(20L); }
public void SRA_A_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xCB, 0x2F // SRA A }); var regs = m.Cpu.Registers; regs.A = 0x10; // --- Act m.Run(); // --- Assert regs.A.ShouldBe((byte)0x08); regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); regs.PFlag.ShouldBeFalse(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F, A"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(8L); }
public void DEC_HLi_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x21, 0x00, 0x10, // LD HL,1000H 0x35 // DEC (HL) }); m.Memory[0x1000] = 0x23; // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; m.ShouldKeepRegisters(except: "HL, F"); m.ShouldKeepMemory(except: "1000"); m.Memory[0x1000].ShouldBe((byte)0x22); regs.PC.ShouldBe((ushort)0x0004); m.Cpu.Tacts.ShouldBe(21L); }
public void SLA_B_SetsSign() { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); m.InitCode(new byte[] { 0xCB, 0x20 // SLA B }); var regs = m.Cpu.Registers; regs.B = 0x48; // --- Act m.Run(); // --- Assert regs.B.ShouldBe((byte)0x90); regs.SFlag.ShouldBeTrue(); regs.ZFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); regs.PFlag.ShouldBeTrue(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "F, B"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(8L); }
public void DEC_A_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x3E, 0x43, // LD A,43H 0x3D // DEC A }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; m.ShouldKeepRegisters(except: "A, F"); m.ShouldKeepMemory(); m.ShouldKeepCFlag(); regs.NFlag.ShouldBeTrue(); regs.A.ShouldBe((byte)0x42); regs.PC.ShouldBe((ushort)0x0003); m.Cpu.Tacts.ShouldBe(11L); }
public void SET_N_HLi_WorksWithBitsPartlyReset() { for (var n = 0; n < 8; n++) { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); var opcn = (byte)(0xC6 | (n << 3)); m.InitCode(new byte[] { 0xCB, opcn // SET N,(HL) }); var regs = m.Cpu.Registers; regs.HL = 0x1000; m.Memory[regs.HL] = 0x55; // --- Act m.Run(); // --- Assert m.Memory[regs.HL].ShouldBe((byte)(0x55 | (1 << n))); m.ShouldKeepRegisters(); m.ShouldKeepMemory(except: "1000"); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(15L); } }
public void EX_SPi_HL_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x31, 0x00, 0x10, // LD SP, 1000H 0x21, 0x34, 0x12, // LD HL, 1234H 0xE3 // EX (SP),HL }); m.Memory[0x1000] = 0x78; m.Memory[0x1001] = 0x56; // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.HL.ShouldBe((ushort)0x5678); m.Memory[0x1000].ShouldBe((byte)0x34); m.Memory[0x1001].ShouldBe((byte)0x12); m.ShouldKeepRegisters(except: "SP, HL"); m.ShouldKeepMemory(except: "1000-1001"); regs.PC.ShouldBe((ushort)0x0007); m.Cpu.Tacts.ShouldBe(39L); }
public void SET_N_C_WorksWithBitsReset() { for (var n = 0; n < 8; n++) { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); var opcn = (byte)(0xC1 | (n << 3)); m.InitCode(new byte[] { 0xCB, opcn // SET N,C }); var regs = m.Cpu.Registers; regs.C = 0x00; // --- Act m.Run(); // --- Assert regs.C.ShouldBe((byte)(1 << n)); m.ShouldKeepRegisters(except: "C"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(8L); } }
public void RET_PO_DoesNotReturnWhenPE() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x88, // LD A,88H 0xCD, 0x06, 0x00, // CALL 0006H 0x76, // HALT 0x87, // ADD A 0xE0, // RET PO 0x3E, 0x24, // LD A,24H 0xC9 // RET }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x24); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0005); m.Cpu.Tacts.ShouldBe(54); }
public void JP_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x16, // LD A,16H 0xC3, 0x06, 0x00, // JP 0006H 0x76, // HALT 0x3E, 0xAA, // LD A,AAH 0x76 // HALT }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0xAA); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0008); m.Cpu.Tacts.ShouldBe(28L); }
public void EX_DE_HL_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x21, 0x34, 0x12, // LD HL,1234H 0x11, 0x78, 0x56, // LD DE,5678H 0xEB // EX DE,HL }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.DE.ShouldBe((ushort)0x1234); regs.HL.ShouldBe((ushort)0x5678); m.ShouldKeepRegisters(except: "HL, DE"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0007); m.Cpu.Tacts.ShouldBe(24L); }
public void CALL_Z_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x16, // LD A,16H 0xAF, // XOR A 0xCC, 0x07, 0x00, // CALL Z,0007H 0x76, // HALT 0x3E, 0x24, // LD A,24H 0xC9 // RET }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x24); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0006); m.Cpu.Tacts.ShouldBe(49L); }
public void XOR_N_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x3E, 0x12, // LD A,12H 0xEE, 0x23 // XOR 23H }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0x31); regs.SFlag.ShouldBeFalse(); regs.ZFlag.ShouldBeFalse(); regs.PFlag.ShouldBeFalse(); regs.HFlag.ShouldBeFalse(); regs.NFlag.ShouldBeFalse(); regs.CFlag.ShouldBeFalse(); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0004); m.Cpu.Tacts.ShouldBe(14L); }
public void CALL_NN_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilHalt); m.InitCode(new byte[] { 0x3E, 0x16, // LD A,16H 0xCD, 0x06, 0x00, // CALL 0006H 0x76, // HALT 0x3E, 0xA3, // LD A,A3H 0xC9 // RET }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.A.ShouldBe((byte)0xA3); m.ShouldKeepRegisters(except: "AF"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0005); m.Cpu.Tacts.ShouldBe(45L); }
public void POP_HL_WorksAsExpected() { // --- Arrange var m = new Z80TestMachine(RunMode.UntilEnd); m.InitCode(new byte[] { 0x01, 0x52, 0x23, // LD BC,2352H 0xC5, // PUSH BC 0xE1 // POP HL }); // --- Act m.Run(); // --- Assert var regs = m.Cpu.Registers; regs.HL.ShouldBe((ushort)0x2352); m.ShouldKeepRegisters(except: "HL, BC"); m.ShouldKeepMemory(except: "FFFE-FFFF"); regs.PC.ShouldBe((ushort)0x0005); m.Cpu.Tacts.ShouldBe(31L); }
public void RES_N_A_WorksWithBitsPartlyReset() { for (var n = 0; n < 8; n++) { // --- Arrange var m = new Z80TestMachine(RunMode.OneInstruction); var opcn = (byte)(0x87 | (n << 3)); m.InitCode(new byte[] { 0xCB, opcn // RES N,A }); var regs = m.Cpu.Registers; regs.A = 0xAA; // --- Act m.Run(); // --- Assert regs.A.ShouldBe((byte)(0xAA & ~(1 << n))); m.ShouldKeepRegisters(except: "A"); m.ShouldKeepMemory(); regs.PC.ShouldBe((ushort)0x0002); m.Cpu.Tacts.ShouldBe(8L); } }