public void Add(Watch w)
 {
     m_watches.Add(w);
 }
 public void WriteProfilingResultsToOutput()
 {
     OutputManager.WriteOutput(Watch.GetResults());
 }
Exemple #3
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        protected override void DoCommandAction()
        {
            FPGATypes.AssertBackendType(FPGATypes.BackendType.ISE);

            // what to route
            NetlistContainer netlist    = GetNetlistContainer();
            XDLNet           netToRoute = (XDLNet)netlist.GetNet(NetName);

            int outpinCount = netToRoute.NetPins.Count(np => np is NetOutpin);

            if (outpinCount != 1)
            {
                throw new ArgumentException("Can not route nets with " + outpinCount + " outpins");
            }
            NetPin outpin = netToRoute.NetPins.First(np => np is NetOutpin);

            // start to route from here
            List <Location> startLocations  = new List <Location>();
            List <Location> targetLocations = new List <Location>();

            // route from outpin
            string   startTileName  = netlist.GetInstanceByName(outpin.InstanceName).Location;
            Tile     startTile      = FPGA.FPGA.Instance.GetTile(startTileName);
            Slice    startSlice     = startTile.GetSliceByName(netlist.GetInstanceByName(outpin.InstanceName).SliceName);
            Port     startPip       = startSlice.PortMapping.Ports.Where(p => p.Name.EndsWith(outpin.SlicePort)).First();
            Location outpinLocation = new Location(startTile, startPip);

            startLocations.Add(outpinLocation);

            Queue <Location> targetQueue = new Queue <Location>(targetLocations);

            foreach (NetPin inpin in netToRoute.NetPins.Where(np => np is NetInpin).OrderBy(np => np.InstanceName))
            {
                string   targetTileName = netlist.GetInstanceByName(inpin.InstanceName).Location;
                Tile     targetTile     = FPGA.FPGA.Instance.GetTile(targetTileName);
                Slice    targetSlice    = targetTile.GetSliceByName(netlist.GetInstanceByName(inpin.InstanceName).SliceName);
                Port     targetPip      = targetSlice.PortMapping.Ports.Where(p => p.Name.EndsWith(inpin.SlicePort)).First();
                Location inpinLocation  = new Location(targetTile, targetPip);

                targetQueue.Enqueue(inpinLocation);
            }

            while (targetQueue.Count > 0)
            {
                // start with new routing
                foreach (XDLPip pip in netToRoute.Pips)
                {
                    Tile newStartTile = FPGA.FPGA.Instance.GetTile(pip.Location);
                    startLocations.Add(new Location(newStartTile, new Port(pip.From)));
                }

                // dequeue next target
                Location targetLocation = targetQueue.Dequeue();

                Watch.Start("route");
                List <Location> revPath = Route(SearchMode, true, startLocations, targetLocation, 0, 100, false).FirstOrDefault();
                Watch.Stop("route");

                // extend net
                if (revPath != null)
                {
                    XDLNet extension = new XDLNet(revPath);
                    netToRoute.Add(extension);
                }
            }

            // block the added pips
            netToRoute.BlockUsedResources();
        }